/external/swiftshader/third_party/llvm-7.0/llvm/lib/Object/ |
D | IRSymtab.cpp | 362 Expected<FileContents> irsymtab::readBitcode(const BitcodeFileContents &BFC) { in readBitcode() argument 363 if (BFC.Mods.empty()) in readBitcode() 367 if (BFC.StrtabForSymtab.empty() || in readBitcode() 368 BFC.Symtab.size() < sizeof(storage::Header)) in readBitcode() 369 return upgrade(BFC.Mods); in readBitcode() 375 auto *Hdr = reinterpret_cast<const storage::Header *>(BFC.Symtab.data()); in readBitcode() 377 StringRef Producer = Hdr->Producer.get(BFC.StrtabForSymtab); in readBitcode() 380 return upgrade(BFC.Mods); in readBitcode() 383 FC.TheReader = {{BFC.Symtab.data(), BFC.Symtab.size()}, in readBitcode() 384 {BFC.StrtabForSymtab.data(), BFC.StrtabForSymtab.size()}}; in readBitcode() [all …]
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/external/llvm/test/CodeGen/ARM/ |
D | fabs-to-bfc.ll | 2 …N: llc < %s -mtriple=armv7-none-linux-gnueabi -mattr=+vfp3 | FileCheck %s -check-prefix=CHECK-BFC 10 ;CHECK-BFC: bfc
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/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/ARM/ |
D | fabs-to-bfc.ll | 2 …N: llc < %s -mtriple=armv7-none-linux-gnueabi -mattr=+vfp3 | FileCheck %s -check-prefix=CHECK-BFC 10 ;CHECK-BFC: bfc
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/external/swiftshader/third_party/llvm-7.0/llvm/tools/llvm-lto2/ |
D | llvm-lto2.cpp | 323 BitcodeFileContents BFC = check(getBitcodeFileContents(*MB), F); in dumpSymtab() local 325 if (BFC.Symtab.size() >= sizeof(irsymtab::storage::Header)) { in dumpSymtab() 327 BFC.Symtab.data()); in dumpSymtab() 330 outs() << "producer: " << Hdr->Producer.get(BFC.StrtabForSymtab) in dumpSymtab()
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/external/swiftshader/third_party/LLVM/test/CodeGen/Thumb2/ |
D | thumb2-bfc.ll | 27 ; 2147483646 = 0x7ffffffe not implementable w/ BFC
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/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Thumb2/ |
D | thumb2-bfc.ll | 27 ; 2147483646 = 0x7ffffffe not implementable w/ BFC
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/external/llvm/test/CodeGen/Thumb2/ |
D | thumb2-bfc.ll | 27 ; 2147483646 = 0x7ffffffe not implementable w/ BFC
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/external/tensorflow/tensorflow/contrib/gdr/ |
D | README.md | 11 …e buffers to NIC and allocating small tensors from the buffer pool using a BFC allocator, it is po… 123 NIC-registered buffers using a BFC allocator. This behavior is similar to the
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/external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/Object/ |
D | IRSymtab.h | 353 Expected<FileContents> readBitcode(const BitcodeFileContents &BFC);
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/ |
D | ARMScheduleSwift.td | 186 // BFI,BFC, SBFX,UBFX 188 (instregex "BFC", "BFI", "UBFX", "SBFX", "(t|t2)BFC", "(t|t2)BFI",
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D | ARMScheduleR52.td | 229 (instregex "BFC", "BFI", "UBFX", "SBFX", "(t|t2)BFC", "(t|t2)BFI",
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D | ARMScheduleA57.td | 356 // Bit field insert/clear: BFI, BFC 357 def : InstRW<[A57Write_2cyc_1M], (instregex "(t2)?BFI", "(t2)?BFC")>;
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D | ARMScheduleA9.td | 120 // BFC, BFI, UBFX, SBFX 2546 def : InstRW< [WriteALUsi], (instregex "BFC", "BFI", "UBFX", "SBFX")>;
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D | ARMFrameLowering.cpp | 304 BuildMI(MBB, MBBI, DL, TII.get(ARM::BFC), Reg) in emitAligningInstructions()
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/external/llvm/lib/Target/ARM/ |
D | ARMScheduleSwift.td | 181 // BFI,BFC, SBFX,UBFX 183 (instregex "BFC", "BFI", "UBFX", "SBFX", "(t|t2)BFC", "(t|t2)BFI",
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D | ARMScheduleA9.td | 120 // BFC, BFI, UBFX, SBFX 2495 def : InstRW< [WriteALUsi], (instregex "BFC", "BFI", "UBFX", "SBFX")>;
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D | ARMFrameLowering.cpp | 256 AddDefaultPred(BuildMI(MBB, MBBI, DL, TII.get(ARM::BFC), Reg) in emitAligningInstructions()
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/external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
D | ARMCodeEmitter.cpp | 1038 } else if ((MCID.Opcode == ARM::BFC) || (MCID.Opcode == ARM::BFI)) { in emitDataProcessingInstruction()
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D | ARMScheduleA9.td | 116 // BFC, BFI, UBFX, SBFX
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/external/tensorflow/tensorflow/core/protobuf/ |
D | config.proto | 46 // "BFC": A "Best-fit with coalescing" algorithm, simplified from a
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/external/honggfuzz/examples/apache-httpd/corpus_http1/ |
D | 68b9c70adfd035f47ab7a117627d67e2.0000a7bd.honggfuzz.cov | 89 …��q)������ET�-�]Q�s?{�j��j�N[}˻;U����q��es�3ԩ�����'���-��n�6c�"�BFC� ˤ�@����5[y�9�(�…
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/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/ARM/ |
D | ARMGenAsmWriter.inc | 1066 555329U, // BFC 4286 80U, // BFC 8225 // BFC, t2BFC
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/external/capstone/arch/ARM/ |
D | ARMGenAsmWriter.inc | 66 26256U, // BFC 2859 16U, // BFC 6099 // BFC, CMNzrsi, CMPrsi, LDRBi12, LDRcp, LDRi12, MOVTi16, QADD, QADD16, Q... 7231 // BFC, t2BFC
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/external/swiftshader/third_party/LLVM/test/MC/Disassembler/ARM/ |
D | basic-arm-instructions.txt | 236 # BFC
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D | thumb2.txt | 172 # BFC
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