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Searched refs:BP_SRC_A7RCR1_A7_CORE1_ENABLE (Results 1 – 1 of 1) sorted by relevance

/external/u-boot/arch/arm/mach-imx/mx7/
Dpsci-mx7.c26 #define BP_SRC_A7RCR1_A7_CORE1_ENABLE 1 macro
64 mask = 1 << (BP_SRC_A7RCR1_A7_CORE1_ENABLE + cpu - 1); in imx_enable_cpu_ca7()