Searched refs:BUS_PCLK_HZ (Results 1 – 6 of 6) sorted by relevance
122 pclk_div = GPLL_HZ / BUS_PCLK_HZ - 1; in rkclk_init()123 assert((pclk_div + 1) * BUS_PCLK_HZ == GPLL_HZ && pclk_div <= 0x7); in rkclk_init()
123 pclk_div = BUS_ACLK_HZ / BUS_PCLK_HZ - 1; in rkclk_init()124 assert((pclk_div + 1) * BUS_PCLK_HZ == GPLL_HZ && pclk_div <= 0x7); in rkclk_init()
184 pclk_div = BUS_ACLK_HZ / BUS_PCLK_HZ - 1; in rkclk_init()185 assert((pclk_div + 1) * BUS_PCLK_HZ == BUS_ACLK_HZ && pclk_div <= 0x7); in rkclk_init()
20 #define BUS_PCLK_HZ 74250000 macro
22 #define BUS_PCLK_HZ 74250000 macro
21 #define BUS_PCLK_HZ 74250000 macro