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Searched refs:BaseRegOp (Results 1 – 3 of 3) sorted by relevance

/external/llvm/lib/Target/AArch64/
DAArch64LoadStoreOptimizer.cpp653 const MachineOperand &BaseRegOp = in mergeNarrowInsns() local
687 .addOperand(BaseRegOp) in mergeNarrowInsns()
776 .addOperand(BaseRegOp) in mergeNarrowInsns()
820 const MachineOperand &BaseRegOp = in mergePairedInsns() local
871 .addOperand(BaseRegOp) in mergePairedInsns()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/
DAArch64LoadStoreOptimizer.cpp679 const MachineOperand &BaseRegOp = in mergeNarrowZeroStores() local
703 .add(BaseRegOp) in mergeNarrowZeroStores()
748 const MachineOperand &BaseRegOp = in mergePairedInsns() local
820 .add(BaseRegOp) in mergePairedInsns()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/AsmParser/
DMipsAsmParser.cpp3572 const MCOperand &BaseRegOp = Inst.getOperand(1); in expandMemInst() local
3573 assert(BaseRegOp.isReg() && "expected register operand kind"); in expandMemInst()
3578 unsigned BaseReg = BaseRegOp.getReg(); in expandMemInst()