Searched refs:BranchOpc (Results 1 – 10 of 10) sorted by relevance
| /external/swiftshader/third_party/LLVM/lib/Target/X86/ |
| D | X86FastISel.cpp | 1019 unsigned BranchOpc; // Opcode to jump on, e.g. "X86::JA" in X86SelectBranch() local
1026 case CmpInst::FCMP_UNE: SwapArgs = false; BranchOpc = X86::JNE_4; break; in X86SelectBranch()
1027 case CmpInst::FCMP_OGT: SwapArgs = false; BranchOpc = X86::JA_4; break; in X86SelectBranch()
1028 case CmpInst::FCMP_OGE: SwapArgs = false; BranchOpc = X86::JAE_4; break; in X86SelectBranch()
1029 case CmpInst::FCMP_OLT: SwapArgs = true; BranchOpc = X86::JA_4; break; in X86SelectBranch()
1030 case CmpInst::FCMP_OLE: SwapArgs = true; BranchOpc = X86::JAE_4; break; in X86SelectBranch()
1031 case CmpInst::FCMP_ONE: SwapArgs = false; BranchOpc = X86::JNE_4; break; in X86SelectBranch()
1032 case CmpInst::FCMP_ORD: SwapArgs = false; BranchOpc = X86::JNP_4; break; in X86SelectBranch()
1033 case CmpInst::FCMP_UNO: SwapArgs = false; BranchOpc = X86::JP_4; break; in X86SelectBranch()
1034 case CmpInst::FCMP_UEQ: SwapArgs = false; BranchOpc = X86::JE_4; break; in X86SelectBranch()
[all …]
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/RISCV/ |
| D | RISCVInstrInfo.h | 80 bool isBranchOffsetInRange(unsigned BranchOpc,
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AVR/ |
| D | AVRInstrInfo.h | 108 bool isBranchOffsetInRange(unsigned BranchOpc,
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/ |
| D | MipsInstrInfo.h | 90 bool isBranchOffsetInRange(unsigned BranchOpc,
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| D | MipsInstrInfo.cpp | 279 bool MipsInstrInfo::isBranchOffsetInRange(unsigned BranchOpc, int64_t BrOffset) const { in isBranchOffsetInRange() argument
280 switch (BranchOpc) { in isBranchOffsetInRange()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/ |
| D | AArch64InstrInfo.h | 167 bool isBranchOffsetInRange(unsigned BranchOpc,
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| /external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/CodeGen/ |
| D | TargetInstrInfo.h | 517 virtual bool isBranchOffsetInRange(unsigned BranchOpc, in isBranchOffsetInRange() argument
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| /external/llvm/lib/Target/X86/ |
| D | X86FastISel.cpp | 1614 unsigned BranchOpc; in X86SelectBranch() local
1618 BranchOpc = X86::GetCondBranchFromCond(CC); in X86SelectBranch()
1626 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(BranchOpc)) in X86SelectBranch()
1679 unsigned BranchOpc = X86::GetCondBranchFromCond(CC); in X86SelectBranch() local
1681 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(BranchOpc)) in X86SelectBranch()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/ |
| D | X86FastISel.cpp | 1696 unsigned BranchOpc; in X86SelectBranch() local
1700 BranchOpc = X86::GetCondBranchFromCond(CC); in X86SelectBranch()
1708 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(BranchOpc)) in X86SelectBranch()
1762 unsigned BranchOpc = X86::GetCondBranchFromCond(CC); in X86SelectBranch() local
1764 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(BranchOpc)) in X86SelectBranch()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
| D | SIInstrInfo.h | 228 bool isBranchOffsetInRange(unsigned BranchOpc,
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