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Searched refs:C0_CFG_AXI0_CLK_DIV_RATIO (Results 1 – 2 of 2) sorted by relevance

/external/u-boot/arch/arm/mach-sunxi/
Dclock_sun9i.c37 writel(C0_CFG_AXI0_CLK_DIV_RATIO(2) | in clock_init_safe()
/external/u-boot/arch/arm/include/asm/arch-sunxi/
Dclock_sun9i.h143 #define C0_CFG_AXI0_CLK_DIV_RATIO(n) (((n - 1) & 0x3) << 0) macro