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Searched refs:CLKID_RNG0 (Results 1 – 3 of 3) sorted by relevance

/external/u-boot/include/dt-bindings/clock/
Dgxbb-clkc.h31 #define CLKID_RNG0 25 macro
/external/u-boot/drivers/clk/
Dclk_meson.c36 MESON_GATE(CLKID_RNG0, HHI_GCLK_MPEG0, 12),
/external/u-boot/arch/arm/dts/
Dmeson-gxbb.dtsi319 clocks = <&clkc CLKID_RNG0>;