| /external/u-boot/drivers/clk/renesas/ |
| D | r8a7790-cpg-mssr.c | 35 CLK_PLL1, enumerator
51 DEF_BASE(".pll1", CLK_PLL1, CLK_TYPE_GEN2_PLL1, CLK_MAIN),
54 DEF_FIXED(".pll1_div2", CLK_PLL1_DIV2, CLK_PLL1, 2, 1),
58 DEF_BASE("lb", R8A7790_CLK_LB, CLK_TYPE_GEN2_LB, CLK_PLL1),
59 DEF_BASE("adsp", R8A7790_CLK_ADSP, CLK_TYPE_GEN2_ADSP, CLK_PLL1),
60 DEF_BASE("sdh", R8A7790_CLK_SDH, CLK_TYPE_GEN2_SDH, CLK_PLL1),
61 DEF_BASE("sd0", R8A7790_CLK_SD0, CLK_TYPE_GEN2_SD0, CLK_PLL1),
62 DEF_BASE("sd1", R8A7790_CLK_SD1, CLK_TYPE_GEN2_SD1, CLK_PLL1),
66 DEF_FIXED("z2", R8A7790_CLK_Z2, CLK_PLL1, 2, 1),
67 DEF_FIXED("zg", R8A7790_CLK_ZG, CLK_PLL1, 3, 1),
[all …]
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| D | r8a7794-cpg-mssr.c | 35 CLK_PLL1, enumerator
51 DEF_BASE(".pll1", CLK_PLL1, CLK_TYPE_GEN2_PLL1, CLK_MAIN),
54 DEF_FIXED(".pll1_div2", CLK_PLL1_DIV2, CLK_PLL1, 2, 1),
57 DEF_BASE("lb", R8A7794_CLK_LB, CLK_TYPE_GEN2_LB, CLK_PLL1),
58 DEF_BASE("adsp", R8A7794_CLK_ADSP, CLK_TYPE_GEN2_ADSP, CLK_PLL1),
59 DEF_BASE("sdh", R8A7794_CLK_SDH, CLK_TYPE_GEN2_SDH, CLK_PLL1),
60 DEF_BASE("sd0", R8A7794_CLK_SD0, CLK_TYPE_GEN2_SD0, CLK_PLL1),
65 DEF_FIXED("zg", R8A7794_CLK_ZG, CLK_PLL1, 6, 1),
66 DEF_FIXED("zx", R8A7794_CLK_ZX, CLK_PLL1, 3, 1),
67 DEF_FIXED("zs", R8A7794_CLK_ZS, CLK_PLL1, 6, 1),
[all …]
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| D | r8a7792-cpg-mssr.c | 34 CLK_PLL1, enumerator
49 DEF_BASE(".pll1", CLK_PLL1, CLK_TYPE_GEN2_PLL1, CLK_MAIN),
52 DEF_FIXED(".pll1_div2", CLK_PLL1_DIV2, CLK_PLL1, 2, 1),
55 DEF_BASE("lb", R8A7792_CLK_LB, CLK_TYPE_GEN2_LB, CLK_PLL1),
59 DEF_FIXED("zg", R8A7792_CLK_ZG, CLK_PLL1, 5, 1),
60 DEF_FIXED("zx", R8A7792_CLK_ZX, CLK_PLL1, 3, 1),
61 DEF_FIXED("zs", R8A7792_CLK_ZS, CLK_PLL1, 6, 1),
62 DEF_FIXED("hp", R8A7792_CLK_HP, CLK_PLL1, 12, 1),
63 DEF_FIXED("i", R8A7792_CLK_I, CLK_PLL1, 3, 1),
64 DEF_FIXED("b", R8A7792_CLK_B, CLK_PLL1, 12, 1),
[all …]
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| D | r8a7791-cpg-mssr.c | 34 CLK_PLL1, enumerator
50 DEF_BASE(".pll1", CLK_PLL1, CLK_TYPE_GEN2_PLL1, CLK_MAIN),
53 DEF_FIXED(".pll1_div2", CLK_PLL1_DIV2, CLK_PLL1, 2, 1),
57 DEF_BASE("lb", R8A7791_CLK_LB, CLK_TYPE_GEN2_LB, CLK_PLL1),
58 DEF_BASE("adsp", R8A7791_CLK_ADSP, CLK_TYPE_GEN2_ADSP, CLK_PLL1),
59 DEF_BASE("sdh", R8A7791_CLK_SDH, CLK_TYPE_GEN2_SDH, CLK_PLL1),
60 DEF_BASE("sd0", R8A7791_CLK_SD0, CLK_TYPE_GEN2_SD0, CLK_PLL1),
64 DEF_FIXED("zg", R8A7791_CLK_ZG, CLK_PLL1, 3, 1),
65 DEF_FIXED("zx", R8A7791_CLK_ZX, CLK_PLL1, 3, 1),
66 DEF_FIXED("zs", R8A7791_CLK_ZS, CLK_PLL1, 6, 1),
[all …]
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| D | r8a77995-cpg-mssr.c | 32 CLK_PLL1, enumerator
57 DEF_BASE(".pll1", CLK_PLL1, CLK_TYPE_GEN3_PLL1, CLK_MAIN),
64 DEF_FIXED(".pll1d2", CLK_PLL1D2, CLK_PLL1, 2, 1),
66 DEF_FIXED(".s0", CLK_S0, CLK_PLL1, 2, 1),
67 DEF_FIXED(".s1", CLK_S1, CLK_PLL1, 3, 1),
68 DEF_FIXED(".s2", CLK_S2, CLK_PLL1, 4, 1),
69 DEF_FIXED(".s3", CLK_S3, CLK_PLL1, 6, 1),
70 DEF_FIXED(".sdsrc", CLK_SDSRC, CLK_PLL1, 2, 1),
71 DEF_FIXED(".rpcsrc", CLK_RPCSRC, CLK_PLL1, 2, 1),
75 DEF_FIXED("ztr", R8A77995_CLK_ZTR, CLK_PLL1, 6, 1),
[all …]
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| D | r8a77990-cpg-mssr.c | 32 CLK_PLL1, enumerator
58 DEF_BASE(".pll1", CLK_PLL1, CLK_TYPE_GEN3_PLL1, CLK_MAIN),
67 DEF_FIXED(".pll1d2", CLK_PLL1D2, CLK_PLL1, 2, 1),
69 DEF_FIXED(".s0", CLK_S0, CLK_PLL1, 2, 1),
70 DEF_FIXED(".s1", CLK_S1, CLK_PLL1, 3, 1),
71 DEF_FIXED(".s2", CLK_S2, CLK_PLL1, 4, 1),
72 DEF_FIXED(".s3", CLK_S3, CLK_PLL1, 6, 1),
73 DEF_FIXED(".sdsrc", CLK_SDSRC, CLK_PLL1, 2, 1),
74 DEF_FIXED(".rpcsrc", CLK_RPCSRC, CLK_PLL1, 2, 1),
79 DEF_FIXED("ztr", R8A77990_CLK_ZTR, CLK_PLL1, 6, 1),
[all …]
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| D | r8a77970-cpg-mssr.c | 33 CLK_PLL1, enumerator
65 DEF_BASE(".pll1", CLK_PLL1, CLK_TYPE_GEN3_PLL1, CLK_MAIN),
68 DEF_FIXED(".pll1_div2", CLK_PLL1_DIV2, CLK_PLL1, 2, 1),
72 DEF_FIXED(".rpcsrc", CLK_RPCSRC, CLK_PLL1, 2, 1),
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| D | r8a7796-cpg-mssr.c | 33 CLK_PLL1, enumerator
60 DEF_BASE(".pll1", CLK_PLL1, CLK_TYPE_GEN3_PLL1, CLK_MAIN),
65 DEF_FIXED(".pll1_div2", CLK_PLL1_DIV2, CLK_PLL1, 2, 1),
72 DEF_FIXED(".rpcsrc", CLK_RPCSRC, CLK_PLL1, 2, 1),
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| D | r8a7795-cpg-mssr.c | 33 CLK_PLL1, enumerator
60 DEF_BASE(".pll1", CLK_PLL1, CLK_TYPE_GEN3_PLL1, CLK_MAIN),
65 DEF_FIXED(".pll1_div2", CLK_PLL1_DIV2, CLK_PLL1, 2, 1),
72 DEF_FIXED(".rpcsrc", CLK_RPCSRC, CLK_PLL1, 2, 1),
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