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Searched refs:CMP0 (Results 1 – 23 of 23) sorted by relevance

/external/swiftshader/third_party/llvm-7.0/llvm/test/Transforms/LoopUnroll/
Dpeel-loop.ll6 ; CHECK: %[[CMP0:.*]] = icmp sgt i32 %k, 0
7 ; CHECK: br i1 %[[CMP0]], label %[[NEXT0:.*]], label %for.end
53 ; CHECK: %[[CMP0:.*]] = icmp sgt i32 %k, 0
54 ; CHECK: br i1 %[[CMP0]], label %[[NEXT0:.*]], label %for.end
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AMDGPU/
Dcontrol-flow-fastregalloc.ll20 ; GCN: v_cmp_eq_u32_e64 [[CMP0:s\[[0-9]+:[0-9]\]]], s{{[0-9]+}}, v0
22 …XEC_LO:[0-9]+]]:[[ANDEXEC_HI:[0-9]+]]{{\]}}, s{{\[}}[[SAVEEXEC_LO]]:[[SAVEEXEC_HI]]{{\]}}, [[CMP0]]
100 ; GCN: v_cmp_eq_u32_e64 [[CMP0:s\[[0-9]+:[0-9]\]]], s{{[0-9]+}}, v0
103 …]:[[ANDEXEC_HI:[0-9]+]]{{\]}}, s{{\[}}[[SAVEEXEC_LO:[0-9]+]]:[[SAVEEXEC_HI:[0-9]+]]{{\]}}, [[CMP0]]
177 ; GCN: v_cmp_ne_u32_e64 [[CMP0:s\[[0-9]+:[0-9]\]]], v0,
180 …]:[[ANDEXEC_HI:[0-9]+]]{{\]}}, s{{\[}}[[SAVEEXEC_LO:[0-9]+]]:[[SAVEEXEC_HI:[0-9]+]]{{\]}}, [[CMP0]]
195 ; GCN: s_mov_b64 exec, [[CMP0]]
Dfdiv.f64.ll19 ; SI-DAG: v_cmp_eq_u32_e64 [[CMP0:s\[[0-9]+:[0-9]+\]]], {{v[0-9]+}}, {{v[0-9]+}}
20 ; SI-DAG: s_xor_b64 vcc, [[CMP0]], vcc
Dtrunc-cmp-constant.ll137 ; XSI: v_cmp_eq_u32_e64 [[CMP0:s\[[0-9]+:[0-9]+\]]], [[TMP]], 0{{$}}
138 ; XSI-NEXT: v_cndmask_b32_e64 [[RESULT:v[0-9]+]], 0, 1, [[CMP0]]
Dxor.ll43 ; SI-DAG: v_cmp_le_f32_e32 [[CMP0:vcc]], 1.0, {{v[0-9]+}}
45 ; SI: s_xor_b64 [[XOR:vcc]], [[CMP1]], [[CMP0]]
Dllvm.amdgcn.div.fmas.ll121 ; SI-DAG: v_cmp_eq_u32_e32 [[CMP0:vcc]], 0, v{{[0-9]+}}
123 ; SI: s_and_b64 vcc, [[CMP0]], [[CMP1]]
/external/swiftshader/third_party/llvm-7.0/llvm/test/Transforms/NewGVN/
Dphi-of-ops-move-block.ll13 ; CHECK-NEXT: [[CMP0:%.*]] = icmp eq i32 [[STOREMERGE]], 0
14 ; CHECK-NEXT: br i1 [[CMP0]], label [[LR_PH:%.*]], label [[CRITEDGE]]
23 ; CHECK-NEXT: [[PHIOFOPS:%.*]] = phi i1 [ [[CMP0]], [[BB1]] ], [ true, [[LR_PH]] ]
/external/swiftshader/third_party/llvm-7.0/llvm/test/Transforms/SLPVectorizer/X86/
Dvector.ll22 ; CHECK-NEXT: [[CMP0:%.*]] = icmp eq i32 [[X0]], [[Y0]]
23 ; CHECK-NEXT: br i1 [[CMP0]], label [[IF:%.*]], label [[ENDIF:%.*]]
Dinsert-element-build-vector.ll79 ; CHECK-NEXT: [[CMP0:%.*]] = icmp ne i32 [[C0]], 0
83 ; CHECK-NEXT: [[S0:%.*]] = select i1 [[CMP0]], float [[A0]], float [[B0]]
115 ; ZEROTHRESH-NEXT: [[CMP0:%.*]] = icmp ne i32 [[C0]], 0
119 ; ZEROTHRESH-NEXT: [[S0:%.*]] = select i1 [[CMP0]], float [[A0]], float [[B0]]
345 ; ZEROTHRESH-NEXT: [[CMP0:%.*]] = icmp ne i32 [[C0]], 0
349 ; ZEROTHRESH-NEXT: [[S0:%.*]] = select i1 [[CMP0]], float [[A0]], float [[B0]]
439 ; ZEROTHRESH-NEXT: [[CMP0:%.*]] = icmp ne i32 [[C0]], 0
441 ; ZEROTHRESH-NEXT: [[S0:%.*]] = select i1 [[CMP0]], float [[A0]], float [[B0]]
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/WebAssembly/
Dlower-em-sjlj.ll41 ; CHECK-NEXT: %[[CMP0:.*]] = icmp ne i32 %__THREW__.val, 0
44 ; CHECK-NEXT: %[[CMP:.*]] = and i1 %[[CMP0]], %[[CMP1]]
112 ; CHECK-NEXT: %[[CMP0:.*]] = icmp ne i32 %[[__THREW__VAL]], 0
115 ; CHECK-NEXT: %[[CMP:.*]] = and i1 %[[CMP0]], %[[CMP1]]
/external/llvm/test/Transforms/InstCombine/
Ddemorgan-zext.ll76 ; CHECK-NEXT: [[CMP0:%.*]] = icmp ne i32 %x, 0
78 ; CHECK-NEXT: [[AND:%.*]] = and i1 [[CMP0]], [[CMP1]]
/external/llvm/test/Transforms/InstSimplify/
DAndOrXor.ll314 ; CHECK-NEXT: [[CMP0:%.*]] = icmp eq i8 %i, 0
315 ; CHECK-NEXT: [[CONV0:%.*]] = zext i1 [[CMP0]] to i16
331 ; CHECK-NEXT: [[CMP0:%.*]] = icmp eq <2 x i8> %i, zeroinitializer
332 ; CHECK-NEXT: [[CONV0:%.*]] = zext <2 x i1> [[CMP0]] to <2 x i3>
/external/llvm/test/CodeGen/AMDGPU/
Dfdiv.f64.ll19 ; SI-DAG: v_cmp_eq_i32_e64 [[CMP0:s\[[0-9]+:[0-9]+\]]], {{v[0-9]+}}, {{v[0-9]+}}
20 ; SI-DAG: s_xor_b64 vcc, [[CMP0]], vcc
Dxor.ll43 ; SI-DAG: v_cmp_le_f32_e32 [[CMP0:vcc]], 0, {{v[0-9]+}}
45 ; SI: s_xor_b64 [[XOR:vcc]], [[CMP0]], [[CMP1]]
Dtrunc-cmp-constant.ll135 ; XSI: v_cmp_eq_i32_e64 [[CMP0:s\[[0-9]+:[0-9]+\]]], [[TMP]], 0{{$}}
136 ; XSI-NEXT: v_cndmask_b32_e64 [[RESULT:v[0-9]+]], 0, 1, [[CMP0]]
Dllvm.amdgcn.div.fmas.ll112 ; SI-DAG: v_cmp_eq_i32_e32 [[CMP0:vcc]], 0, v{{[0-9]+}}
114 ; SI: s_and_b64 vcc, [[CMP0]], [[CMP1]]
/external/swiftshader/third_party/llvm-7.0/llvm/test/Transforms/InstSimplify/
DAndOrXor.ll530 ; CHECK-NEXT: [[CMP0:%.*]] = icmp eq i8 [[I:%.*]], 0
531 ; CHECK-NEXT: [[CONV0:%.*]] = zext i1 [[CMP0]] to i16
547 ; CHECK-NEXT: [[CMP0:%.*]] = icmp eq <2 x i8> [[I:%.*]], zeroinitializer
548 ; CHECK-NEXT: [[CONV0:%.*]] = zext <2 x i1> [[CMP0]] to <2 x i3>
592 ; CHECK-NEXT: [[CMP0:%.*]] = icmp ne i8 [[I:%.*]], 0
593 ; CHECK-NEXT: [[CONV0:%.*]] = zext i1 [[CMP0]] to i16
/external/swiftshader/third_party/llvm-7.0/llvm/test/DebugInfo/
Dunrolled-loop-remainder.ll14 ; CHECK: br i1 %[[CMP0:.*]], label %[[PRE:.*]], label %for.body.prol.loopexit, !dbg !24
/external/swiftshader/third_party/llvm-7.0/llvm/test/Transforms/LoopUnroll/ARM/
Dloop-unrolling.ll209 ; CHECK-UNROLL-T2: [[CMP0:%[a-z.0-9]+]] = icmp eq %struct.Node* [[VAR0:%[a-z.0-9]+]], null
210 ; CHECK-UNROLL-T2: br i1 [[CMP0]], label [[END:%[a-z.0-9]+]]
/external/swiftshader/third_party/llvm-7.0/llvm/test/Transforms/InstCombine/
Ddemorgan.ll460 ; CHECK-NEXT: [[CMP0:%.*]] = icmp eq i32 %x, 0
462 ; CHECK-NEXT: [[TMP1:%.*]] = or i1 [[CMP1]], [[CMP0]]
/external/swiftshader/third_party/llvm-7.0/llvm/test/Transforms/SLPVectorizer/AMDGPU/
Dreduction.ll356 ; VI-NEXT: [[CMP0:%.*]] = icmp ult i16 [[ELT1]], [[ELT0]]
357 ; VI-NEXT: [[MIN1:%.*]] = select i1 [[CMP0]], i16 [[ELT1]], i16 [[ELT0]]
438 ; VI-NEXT: [[CMP0:%.*]] = icmp slt i16 [[ELT1]], [[ELT0]]
439 ; VI-NEXT: [[MIN1:%.*]] = select i1 [[CMP0]], i16 [[ELT1]], i16 [[ELT0]]
/external/swiftshader/third_party/LLVM/lib/Target/X86/
DX86ISelLowering.cpp13224 SDValue CMP0 = N0->getOperand(1); in CMPEQCombine() local
13229 if (CMP0.getOpcode() != X86ISD::CMP || CMP0 != CMP1) in CMPEQCombine()
13232 SDValue CMP00 = CMP0->getOperand(0); in CMPEQCombine()
13233 SDValue CMP01 = CMP0->getOperand(1); in CMPEQCombine()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/
DX86ISelLowering.cpp34378 SDValue CMP0 = N0->getOperand(1); in combineCompareEqual() local
34383 if (CMP0.getOpcode() != X86ISD::CMP || CMP0 != CMP1) in combineCompareEqual()
34386 SDValue CMP00 = CMP0->getOperand(0); in combineCompareEqual()
34387 SDValue CMP01 = CMP0->getOperand(1); in combineCompareEqual()