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Searched refs:CONFIG_SYS_INIT_L2_ADDR (Results 1 – 25 of 27) sorted by relevance

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/external/u-boot/include/configs/
DC29XPCIE.h300 #define CONFIG_SYS_INIT_L2_ADDR 0xf8f80000 macro
301 #define CONFIG_SYS_INIT_L2_ADDR_PHYS CONFIG_SYS_INIT_L2_ADDR
303 #define CONFIG_SYS_INIT_L2_END (CONFIG_SYS_INIT_L2_ADDR + CONFIG_SYS_L2_SIZE)
305 #define CONFIG_SPL_RELOC_STACK (CONFIG_SYS_INIT_L2_ADDR + 128 * 1024)
307 #define CONFIG_SPL_RELOC_MALLOC_ADDR (CONFIG_SYS_INIT_L2_ADDR + 160 * 1024)
309 #define CONFIG_SPL_GD_ADDR (CONFIG_SYS_INIT_L2_ADDR + 112 * 1024)
312 #define CONFIG_SYS_INIT_L2_ADDR 0xf8f80000 macro
313 #define CONFIG_SYS_INIT_L2_ADDR_PHYS CONFIG_SYS_INIT_L2_ADDR
315 #define CONFIG_SYS_INIT_L2_END (CONFIG_SYS_INIT_L2_ADDR + CONFIG_SYS_L2_SIZE)
317 #define CONFIG_SPL_RELOC_STACK (CONFIG_SYS_INIT_L2_ADDR + 192 * 1024)
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DP1022DS.h304 #define CONFIG_SYS_INIT_L2_ADDR 0xf8f80000 macro
305 #define CONFIG_SYS_INIT_L2_ADDR_PHYS CONFIG_SYS_INIT_L2_ADDR
307 #define CONFIG_SYS_INIT_L2_END (CONFIG_SYS_INIT_L2_ADDR + CONFIG_SYS_L2_SIZE)
309 #define CONFIG_SPL_RELOC_STACK (CONFIG_SYS_INIT_L2_ADDR + 116 * 1024)
311 #define CONFIG_SPL_RELOC_MALLOC_ADDR (CONFIG_SYS_INIT_L2_ADDR + 148 * 1024)
313 #define CONFIG_SPL_GD_ADDR (CONFIG_SYS_INIT_L2_ADDR + 112 * 1024)
316 #define CONFIG_SYS_INIT_L2_ADDR 0xf8f80000 macro
317 #define CONFIG_SYS_INIT_L2_ADDR_PHYS CONFIG_SYS_INIT_L2_ADDR
319 #define CONFIG_SYS_INIT_L2_END (CONFIG_SYS_INIT_L2_ADDR + CONFIG_SYS_L2_SIZE)
321 #define CONFIG_SPL_RELOC_STACK (CONFIG_SYS_INIT_L2_ADDR + 192 * 1024)
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DP1010RDB.h495 #define CONFIG_SYS_INIT_L2_ADDR 0xD0000000 macro
496 #define CONFIG_SYS_INIT_L2_ADDR_PHYS CONFIG_SYS_INIT_L2_ADDR
498 #define CONFIG_SYS_INIT_L2_END (CONFIG_SYS_INIT_L2_ADDR + CONFIG_SYS_L2_SIZE)
500 #define CONFIG_SPL_RELOC_STACK (CONFIG_SYS_INIT_L2_ADDR + 112 * 1024)
502 #define CONFIG_SPL_RELOC_MALLOC_ADDR (CONFIG_SYS_INIT_L2_ADDR + 128 * 1024)
504 #define CONFIG_SPL_GD_ADDR (CONFIG_SYS_INIT_L2_ADDR + 96 * 1024)
507 #define CONFIG_SYS_INIT_L2_ADDR 0xD0000000 macro
508 #define CONFIG_SYS_INIT_L2_ADDR_PHYS CONFIG_SYS_INIT_L2_ADDR
510 #define CONFIG_SYS_INIT_L2_END (CONFIG_SYS_INIT_L2_ADDR + CONFIG_SYS_L2_SIZE)
512 #define CONFIG_SPL_RELOC_STACK (CONFIG_SYS_INIT_L2_ADDR + 192 * 1024)
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Dp1_p2_rdb_pc.h516 #define CONFIG_SYS_INIT_L2_ADDR 0xf8f80000 macro
517 #define CONFIG_SYS_INIT_L2_ADDR_PHYS CONFIG_SYS_INIT_L2_ADDR
518 #define CONFIG_SYS_INIT_L2_END (CONFIG_SYS_INIT_L2_ADDR + CONFIG_SYS_L2_SIZE)
520 #define CONFIG_SPL_GD_ADDR (CONFIG_SYS_INIT_L2_ADDR + 112 * 1024)
521 #define CONFIG_SPL_RELOC_STACK (CONFIG_SYS_INIT_L2_ADDR + 116 * 1024)
523 #define CONFIG_SPL_RELOC_MALLOC_ADDR (CONFIG_SYS_INIT_L2_ADDR + 148 * 1024)
531 #define CONFIG_SYS_INIT_L2_ADDR 0xf8f80000 macro
532 #define CONFIG_SYS_INIT_L2_ADDR_PHYS CONFIG_SYS_INIT_L2_ADDR
533 #define CONFIG_SYS_INIT_L2_END (CONFIG_SYS_INIT_L2_ADDR + CONFIG_SYS_L2_SIZE)
535 #define CONFIG_SPL_RELOC_STACK (CONFIG_SYS_INIT_L2_ADDR + 192 * 1024)
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DMPC8569MDS.h58 #define CONFIG_SYS_INIT_L2_ADDR 0xf8f80000 macro
59 #define CONFIG_SYS_INIT_L2_ADDR_PHYS CONFIG_SYS_INIT_L2_ADDR
61 #define CONFIG_SYS_INIT_L2_END (CONFIG_SYS_INIT_L2_ADDR + CONFIG_SYS_L2_SIZE)
168 #define CONFIG_SYS_NAND_U_BOOT_DST (CONFIG_SYS_INIT_L2_ADDR)
170 (CONFIG_SYS_INIT_L2_ADDR + CONFIG_SYS_NAND_SPL_SIZE)
DMPC8572DS.h59 #define CONFIG_SYS_INIT_L2_ADDR 0xf8f80000 macro
63 #define CONFIG_SYS_INIT_L2_ADDR_PHYS CONFIG_SYS_INIT_L2_ADDR
66 #define CONFIG_SYS_INIT_L2_END (CONFIG_SYS_INIT_L2_ADDR + CONFIG_SYS_L2_SIZE)
287 #define CONFIG_SYS_NAND_U_BOOT_DST (CONFIG_SYS_INIT_L2_ADDR)
289 (CONFIG_SYS_INIT_L2_ADDR + CONFIG_SYS_NAND_SPL_SIZE)
DMPC8536DS.h68 #define CONFIG_SYS_INIT_L2_ADDR 0xf8f80000 macro
72 #define CONFIG_SYS_INIT_L2_ADDR_PHYS CONFIG_SYS_INIT_L2_ADDR
75 #define CONFIG_SYS_INIT_L2_END (CONFIG_SYS_INIT_L2_ADDR + CONFIG_SYS_L2_SIZE)
284 #define CONFIG_SYS_NAND_U_BOOT_DST (CONFIG_SYS_INIT_L2_ADDR)
286 (CONFIG_SYS_INIT_L2_ADDR + CONFIG_SYS_NAND_SPL_SIZE)
Dcontrolcenterd.h64 #define CONFIG_SYS_INIT_L2_ADDR 0xf8fc0000 macro
68 #define CONFIG_SYS_INIT_L2_ADDR_PHYS CONFIG_SYS_INIT_L2_ADDR
71 #define CONFIG_SYS_INIT_L2_END (CONFIG_SYS_INIT_L2_ADDR + CONFIG_SYS_L2_SIZE)
Dsbc8548.h371 #define CONFIG_SYS_INIT_L2_ADDR 0xf8f80000 /* relocate boot L2SRAM */ macro
/external/u-boot/board/freescale/mpc8536ds/
Dtlb.c58 #if defined(CONFIG_SYS_RAMBOOT) && defined(CONFIG_SYS_INIT_L2_ADDR)
60 SET_TLB_ENTRY(1, CONFIG_SYS_INIT_L2_ADDR, CONFIG_SYS_INIT_L2_ADDR_PHYS,
63 SET_TLB_ENTRY(1, CONFIG_SYS_INIT_L2_ADDR + 0x40000,
/external/u-boot/board/freescale/mpc8569mds/
Dtlb.c82 #if defined(CONFIG_SYS_RAMBOOT) && defined(CONFIG_SYS_INIT_L2_ADDR)
84 SET_TLB_ENTRY(1, CONFIG_SYS_INIT_L2_ADDR, CONFIG_SYS_INIT_L2_ADDR_PHYS,
87 SET_TLB_ENTRY(1, CONFIG_SYS_INIT_L2_ADDR + 0x40000,
/external/u-boot/board/Arcturus/ucp1020/
Dtlb.c86 #ifdef CONFIG_SYS_INIT_L2_ADDR
88 SET_TLB_ENTRY(1, CONFIG_SYS_INIT_L2_ADDR, CONFIG_SYS_INIT_L2_ADDR_PHYS,
92 SET_TLB_ENTRY(1, CONFIG_SYS_INIT_L2_ADDR + 0x40000,
Dspl.c83 bd->bi_memstart = CONFIG_SYS_INIT_L2_ADDR; in board_init_r()
/external/u-boot/board/freescale/mpc8572ds/
Dtlb.c74 #if defined(CONFIG_SYS_RAMBOOT) && defined(CONFIG_SYS_INIT_L2_ADDR)
76 SET_TLB_ENTRY(1, CONFIG_SYS_INIT_L2_ADDR,
80 SET_TLB_ENTRY(1, CONFIG_SYS_INIT_L2_ADDR + 0x40000,
/external/u-boot/board/freescale/p1_p2_rdb_pc/
Dtlb.c96 #ifdef CONFIG_SYS_INIT_L2_ADDR
98 SET_TLB_ENTRY(1, CONFIG_SYS_INIT_L2_ADDR, CONFIG_SYS_INIT_L2_ADDR_PHYS,
102 SET_TLB_ENTRY(1, CONFIG_SYS_INIT_L2_ADDR + 0x40000,
Dspl.c75 bd->bi_memstart = CONFIG_SYS_INIT_L2_ADDR; in board_init_r()
/external/u-boot/arch/powerpc/cpu/mpc85xx/
Dspl_minimal.c16 #ifdef CONFIG_SYS_INIT_L2_ADDR in cpu_init_f()
19 out_be32(&l2cache->l2srbar0, CONFIG_SYS_INIT_L2_ADDR); in cpu_init_f()
Dcpu_init.c602 #if defined(CONFIG_SYS_RAMBOOT) && defined(CONFIG_SYS_INIT_L2_ADDR) in l2cache_init()
659 #if defined(CONFIG_SYS_INIT_L2_ADDR) && defined(CONFIG_SYS_FLASH_BASE) in l2cache_init()
663 l2srbar = CONFIG_SYS_INIT_L2_ADDR; in l2cache_init()
665 printf(", moving to 0x%08x", CONFIG_SYS_INIT_L2_ADDR); in l2cache_init()
/external/u-boot/board/freescale/p1010rdb/
Dtlb.c82 #ifdef CONFIG_SYS_INIT_L2_ADDR
84 SET_TLB_ENTRY(1, CONFIG_SYS_INIT_L2_ADDR, CONFIG_SYS_INIT_L2_ADDR_PHYS,
Dspl.c69 bd->bi_memstart = CONFIG_SYS_INIT_L2_ADDR; in board_init_r()
/external/u-boot/board/freescale/c29xpcie/
Dtlb.c77 #ifdef CONFIG_SYS_INIT_L2_ADDR
78 SET_TLB_ENTRY(1, CONFIG_SYS_INIT_L2_ADDR, CONFIG_SYS_INIT_L2_ADDR_PHYS,
Dspl.c53 bd->bi_memstart = CONFIG_SYS_INIT_L2_ADDR; in board_init_r()
/external/u-boot/board/freescale/p1022ds/
Dtlb.c93 #ifdef CONFIG_SYS_INIT_L2_ADDR
95 SET_TLB_ENTRY(1, CONFIG_SYS_INIT_L2_ADDR, CONFIG_SYS_INIT_L2_ADDR_PHYS,
Dspl.c83 bd->bi_memstart = CONFIG_SYS_INIT_L2_ADDR; in board_init_r()
/external/u-boot/board/gdsys/p1022/
Dtlb.c47 SET_TLB_ENTRY(1, CONFIG_SYS_INIT_L2_ADDR, CONFIG_SYS_INIT_L2_ADDR_PHYS,

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