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Searched refs:CORE_PLL (Results 1 – 6 of 6) sorted by relevance

/external/u-boot/arch/arm/mach-keystone/include/mach/
Dclock-k2e.h16 #define CORE_PLL_800 {CORE_PLL, 16, 1, 2}
17 #define CORE_PLL_850 {CORE_PLL, 17, 1, 2}
18 #define CORE_PLL_1000 {CORE_PLL, 20, 1, 2}
19 #define CORE_PLL_1200 {CORE_PLL, 24, 1, 2}
21 #define CORE_PLL_1250 {CORE_PLL, 25, 1, 2}
22 #define CORE_PLL_1350 {CORE_PLL, 27, 1, 2}
23 #define CORE_PLL_1400 {CORE_PLL, 28, 1, 2}
24 #define CORE_PLL_1500 {CORE_PLL, 30, 1, 2}
Dclock-k2l.h16 #define CORE_PLL_799 {CORE_PLL, 13, 1, 2}
17 #define CORE_PLL_983 {CORE_PLL, 16, 1, 2}
18 #define CORE_PLL_1000 {CORE_PLL, 114, 7, 2}
19 #define CORE_PLL_1167 {CORE_PLL, 19, 1, 2}
20 #define CORE_PLL_1198 {CORE_PLL, 39, 2, 2}
21 #define CORE_PLL_1228 {CORE_PLL, 20, 1, 2}
Dclock-k2hk.h16 #define CORE_PLL_799 {CORE_PLL, 13, 1, 2}
17 #define CORE_PLL_983 {CORE_PLL, 16, 1, 2}
18 #define CORE_PLL_999 {CORE_PLL, 122, 15, 1}
19 #define CORE_PLL_1167 {CORE_PLL, 19, 1, 2}
20 #define CORE_PLL_1228 {CORE_PLL, 20, 1, 2}
21 #define CORE_PLL_1200 {CORE_PLL, 625, 32, 2}
Dclock.h30 #define CORE_PLL MAIN_PLL macro
Dclock_defs.h67 #define pll0div_read(N) ((pllctl_reg_read(CORE_PLL, div##N) & 0xff) + 1)
/external/u-boot/arch/arm/mach-keystone/
Dclock.c28 [CORE_PLL] = {KS2_MAINPLLCTL0, KS2_MAINPLLCTL1},
349 freq = pll_freq_get(CORE_PLL); in ks_clk_get_rate()
371 freq = pll_freq_get(CORE_PLL) / pll0div_read(1); in ks_clk_get_rate()
374 return pll_freq_get(CORE_PLL) / pll0div_read(2); in ks_clk_get_rate()
377 freq = pll_freq_get(CORE_PLL) / pll0div_read(3); in ks_clk_get_rate()
380 freq = pll_freq_get(CORE_PLL) / pll0div_read(4); in ks_clk_get_rate()