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Searched refs:CQSPI_REG_SDRAMLEVEL (Results 1 – 1 of 1) sorted by relevance

/external/u-boot/drivers/spi/
Dcadence_qspi_apb.c110 #define CQSPI_REG_SDRAMLEVEL 0x2C macro
167 (((readl(reg_base + CQSPI_REG_SDRAMLEVEL)) >> \
171 (((readl(reg_base + CQSPI_REG_SDRAMLEVEL)) >> \
605 u32 reg = readl(plat->regbase + CQSPI_REG_SDRAMLEVEL); in cadence_qspi_get_rd_sram_level()
755 ret = wait_for_bit_le32(plat->regbase + CQSPI_REG_SDRAMLEVEL, in cadence_qspi_apb_indirect_write_execute()