Searched refs:CSITE_CPU_DBG3_LAR (Results 1 – 2 of 2) sorted by relevance
| /external/u-boot/arch/arm/mach-tegra/ | ||
| D | cpu.h | 43 #define CSITE_CPU_DBG3_LAR (NV_PA_CSITE_BASE + 0x16FB0) macro |
| D | cpu.c | 401 writel(rst, CSITE_CPU_DBG3_LAR); in clock_enable_coresight() |