Searched refs:Conv1 (Results 1 – 4 of 4) sorted by relevance
| /external/clang/test/SemaCXX/ |
| D | cxx1y-deduced-return-type.cpp | 13 struct Conv1 { struct
18 Conv1::operator auto() { return 123; } in operator auto()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/ |
| D | PPCISelLowering.cpp | 8348 SDValue Conv1 = DAG.getNode(ISD::BITCAST, dl, MVT::v8i16, V1); in lowerToVINSERTH() local
8354 SDValue Ins = DAG.getNode(PPCISD::VECINSERT, dl, MVT::v8i16, Conv1, Conv2, in lowerToVINSERTH()
8359 SDValue Ins = DAG.getNode(PPCISD::VECINSERT, dl, MVT::v8i16, Conv1, Conv2, in lowerToVINSERTH()
8384 SDValue Conv1 = DAG.getNode(ISD::BITCAST, dl, MVT::v4i32, V1); in LowerVECTOR_SHUFFLE() local
8389 SDValue Ins = DAG.getNode(PPCISD::VECINSERT, dl, MVT::v4i32, Conv1, Shl, in LowerVECTOR_SHUFFLE()
8393 SDValue Ins = DAG.getNode(PPCISD::VECINSERT, dl, MVT::v4i32, Conv1, Conv2, in LowerVECTOR_SHUFFLE()
8411 SDValue Conv1 = DAG.getNode(ISD::BITCAST, dl, MVT::v4i32, V1); in LowerVECTOR_SHUFFLE() local
8415 SDValue Shl = DAG.getNode(PPCISD::VECSHL, dl, MVT::v4i32, Conv1, Conv2, in LowerVECTOR_SHUFFLE()
8424 SDValue Conv1 = DAG.getNode(ISD::BITCAST, dl, MVT::v2i64, V1); in LowerVECTOR_SHUFFLE() local
8428 SDValue PermDI = DAG.getNode(PPCISD::XXPERMDI, dl, MVT::v2i64, Conv1, Conv2, in LowerVECTOR_SHUFFLE()
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| /external/clang/lib/Sema/ |
| D | SemaOverload.cpp | 3364 CXXConversionDecl *Conv1 = dyn_cast_or_null<CXXConversionDecl>(Function1); in compareConversionFunctions() local
3365 if (!Conv1) in compareConversionFunctions()
3372 if (Conv1->getParent()->isLambda() && Conv2->getParent()->isLambda()) { in compareConversionFunctions()
3373 bool Block1 = Conv1->getConversionType()->isBlockPointerType(); in compareConversionFunctions()
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| /external/llvm/lib/Target/PowerPC/ |
| D | PPCISelLowering.cpp | 7450 SDValue Conv1 = DAG.getNode(ISD::BITCAST, dl, MVT::v4i32, V1); in LowerVECTOR_SHUFFLE() local
7455 SDValue Ins = DAG.getNode(PPCISD::XXINSERT, dl, MVT::v4i32, Conv1, Shl, in LowerVECTOR_SHUFFLE()
7459 SDValue Ins = DAG.getNode(PPCISD::XXINSERT, dl, MVT::v4i32, Conv1, Conv2, in LowerVECTOR_SHUFFLE()
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