Searched refs:CopyDstReg (Results 1 – 6 of 6) sorted by relevance
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/ |
| D | RegAllocFast.cpp | 919 unsigned CopyDstReg = 0; in allocateBasicBlock() local
923 CopyDstReg = MI.getOperand(0).getReg(); in allocateBasicBlock()
987 CopyDstReg = 0; in allocateBasicBlock()
1001 LiveRegMap::iterator LRI = reloadVirtReg(MI, I, Reg, CopyDstReg); in allocateBasicBlock()
1053 CopyDstReg = 0; // cancel coalescing; in allocateBasicBlock()
1055 CopyDstReg = (CopyDstReg == Reg || CopyDstReg == PhysReg) ? PhysReg : 0; in allocateBasicBlock()
1066 if (CopyDstReg && CopyDstReg == CopySrcReg && CopyDstSub == CopySrcSub) { in allocateBasicBlock()
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| D | MachineCopyPropagation.cpp | 349 unsigned CopyDstReg = Copy.getOperand(0).getReg(); in forwardUses() local
354 if (MOUse.getReg() != CopyDstReg) { in forwardUses()
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| D | MachineLICM.cpp | 964 unsigned CopyDstReg = MI.getOperand(0).getReg(); in isCopyFeedingInvariantStore() local
966 assert (TargetRegisterInfo::isVirtualRegister(CopyDstReg) && in isCopyFeedingInvariantStore()
969 for (MachineInstr &UseMI : MRI->use_instructions(CopyDstReg)) { in isCopyFeedingInvariantStore()
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| D | RegisterCoalescer.cpp | 1134 unsigned CopyDstReg = DstOperand.getReg(); in reMaterializeTrivialDef() local
1319 } else if (NewMI.getOperand(0).getReg() != CopyDstReg) { in reMaterializeTrivialDef()
1326 CopyDstReg, true /*IsDef*/, true /*IsImp*/, false /*IsKill*/)); in reMaterializeTrivialDef()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/ |
| D | AArch64RedundantCopyElimination.cpp | 325 MCPhysReg CopyDstReg = PredI->getOperand(0).getReg(); in optimizeBlock() local
333 OptBBClobberedRegs.available(CopyDstReg)) { in optimizeBlock()
334 KnownRegs.push_back(RegImm(CopyDstReg, KnownReg.Imm)); in optimizeBlock()
341 if (CopyDstReg == KnownReg.Reg && in optimizeBlock()
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| /external/llvm/lib/CodeGen/ |
| D | RegisterCoalescer.cpp | 918 unsigned CopyDstReg = DstOperand.getReg(); in reMaterializeTrivialDef() local
1068 } else if (NewMI.getOperand(0).getReg() != CopyDstReg) { in reMaterializeTrivialDef()
1075 CopyDstReg, true /*IsDef*/, true /*IsImp*/, false /*IsKill*/)); in reMaterializeTrivialDef()
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