| /external/llvm/lib/Transforms/InstCombine/ |
| D | InstCombineMulDivRem.cpp | 1227 bool Cvt = FpVal.getExactInverse(&Reciprocal); in CvtFDivConstToReciprocal() local
1229 if (!Cvt && AllowReciprocal && FpVal.isFiniteNonZero()) { in CvtFDivConstToReciprocal()
1232 Cvt = !Reciprocal.isDenormal(); in CvtFDivConstToReciprocal()
1235 if (!Cvt) in CvtFDivConstToReciprocal()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
| D | SIISelLowering.cpp | 3741 SDValue Cvt = DAG.getNode(AMDGPUISD::CVT_PKRTZ_F16_F32, SL, MVT::i32, in ReplaceNodeResults() local
3743 Results.push_back(DAG.getNode(ISD::BITCAST, SL, MVT::v2f16, Cvt)); in ReplaceNodeResults()
3764 SDValue Cvt = DAG.getNode(Opcode, SL, MVT::i32, Src0, Src1); in ReplaceNodeResults() local
3765 Results.push_back(DAG.getNode(ISD::BITCAST, SL, MVT::v2i16, Cvt)); in ReplaceNodeResults()
5551 SDValue Cvt = NewLoad; in widenLoad() local
5553 Cvt = DAG.getNode(ISD::SIGN_EXTEND_INREG, SL, MVT::i32, NewLoad, in widenLoad()
5557 Cvt = DAG.getZeroExtendInReg(NewLoad, SL, TruncVT); in widenLoad()
5565 DCI.AddToWorklist(Cvt.getNode()); in widenLoad()
5569 Cvt = getLoadExtOrTrunc(DAG, Ld->getExtensionType(), Cvt, SL, IntVT); in widenLoad()
5570 DCI.AddToWorklist(Cvt.getNode()); in widenLoad()
[all …]
|
| /external/swiftshader/third_party/subzero/src/ |
| D | IceTargetLoweringX86BaseImpl.h | 2980 _cvt(T, Src0RM, Traits::Insts::Cvt::Float2float);
2990 _cvt(T, Src0R, Traits::Insts::Cvt::Tps2dq);
3011 _cvt(T_1, Src0RM, Traits::Insts::Cvt::Tss2si);
3041 _cvt(T_1, Src0RM, Traits::Insts::Cvt::Tss2si);
3054 _cvt(T, Src0R, Traits::Insts::Cvt::Dq2ps);
3074 _cvt(T_2, T_1, Traits::Insts::Cvt::Si2ss);
3102 _cvt(T_2, T_1, Traits::Insts::Cvt::Si2ss);
4589 _cvt(T, Src0R, Traits::Insts::Cvt::Ps2dq);
4610 _cvt(T_1, Src0RM, Traits::Insts::Cvt::Ss2si);
|
| D | IceTargetLoweringX86Base.h | 629 typename Traits::Insts::Cvt::CvtVariant Variant) { in _cvt()
631 Context.insert<typename Traits::Insts::Cvt>(Dest, Src0, Variant); in _cvt()
|
| D | IceInstX86Base.h | 97 Cvt, enumerator
2593 return InstX86Base::isClassof(Instr, InstX86Base::Cvt); in classof()
3287 using Cvt = typename InstImpl<TraitsType>::InstX86Cvt; member
|
| D | IceInstX86BaseImpl.h | 248 : InstX86Base(Func, InstX86Base::Cvt, 1, Dest), Variant(Variant) { in InstX86Cvt()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/NVPTX/ |
| D | NVPTXISelDAGToDAG.cpp | 2325 SDNode *Cvt = CurDAG->getMachineNode(NVPTX::CVT_u32_u16, DL, in tryStoreParam() local
2327 Ops[0] = SDValue(Cvt, 0); in tryStoreParam()
2334 SDNode *Cvt = CurDAG->getMachineNode(NVPTX::CVT_s32_s16, DL, in tryStoreParam() local
2336 Ops[0] = SDValue(Cvt, 0); in tryStoreParam()
|
| /external/llvm/lib/Target/NVPTX/ |
| D | NVPTXISelDAGToDAG.cpp | 3108 SDNode *Cvt = CurDAG->getMachineNode(NVPTX::CVT_u32_u16, DL, in tryStoreParam() local
3110 Ops[0] = SDValue(Cvt, 0); in tryStoreParam()
3117 SDNode *Cvt = CurDAG->getMachineNode(NVPTX::CVT_s32_s16, DL, in tryStoreParam() local
3119 Ops[0] = SDValue(Cvt, 0); in tryStoreParam()
|
| /external/llvm/lib/Target/AMDGPU/ |
| D | SIISelLowering.cpp | 2432 SDValue Cvt = DAG.getNode(AMDGPUISD::CVT_F32_UBYTE0, DL, VT, Src); in performUCharToFloatCombine() local
2433 DCI.AddToWorklist(Cvt.getNode()); in performUCharToFloatCombine()
2434 return Cvt; in performUCharToFloatCombine()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.cpp | 5200 SDValue Cvt = DAG.getNode(ARMISD::VMOVrh, SDLoc(Op), MVT::i32, Op); in ExpandBITCAST() local
5201 DAG.ReplaceAllUsesWith(*ZeroExtend, &Cvt); in ExpandBITCAST()
5202 return Cvt; in ExpandBITCAST()
5227 SDValue Cvt; in ExpandBITCAST() local
5230 Cvt = DAG.getNode(ARMISD::VMOVRRD, dl, in ExpandBITCAST()
5234 Cvt = DAG.getNode(ARMISD::VMOVRRD, dl, in ExpandBITCAST()
5237 return DAG.getNode(ISD::BUILD_PAIR, dl, MVT::i64, Cvt, Cvt.getValue(1)); in ExpandBITCAST()
|
| /external/honggfuzz/examples/apache-httpd/corpus_http2/ |
| D | f4438f4b95a18f29896a3bf029a8ba22.000193ad.honggfuzz.cov | 122 …z6�7/�B������V�F?��7&��M�E/�-�P��Zx}�-�9� ����ȃ 8����K�J�����C!��Cvt�!h3�<[�|����${}���…
6550 …z6�7/�B������V�F?��7&��M�E/�-�P��Zx}�-�9� ����ȃ 8����K�J�����C!��Cvt�!h3�<[�|����${}���…
|
| /external/honggfuzz/examples/apache-httpd/corpus_http1/ |
| D | f4438f4b95a18f29896a3bf029a8ba22.000193ad.honggfuzz.cov | 122 …z6�7/�B������V�F?��7&��M�E/�-�P��Zx}�-�9� ����ȃ 8����K�J�����C!��Cvt�!h3�<[�|����${}���…
6550 …z6�7/�B������V�F?��7&��M�E/�-�P��Zx}�-�9� ����ȃ 8����K�J�����C!��Cvt�!h3�<[�|����${}���…
|
| D | 5da4d762b599b04343a2c1766a3ccd98.0004de4b.honggfuzz.cov | 202 …z6�7/�B������V�F?��7&��M�E/�-�P��Zx}�-�9� ����ȃ 8����K�J�����C!��Cvt�!h3�<[�|����${}���…
|
| D | f91ab0555812950a11a425db91c12bfd.000aecd7.honggfuzz.cov | 473 …z6�7/�B������V�F?��7&��M�E/�-�P��Zx}�-�9� ����ȃ 8����K�J�����C!��Cvt�!h3�<[�|����${}���…
|
| /external/swiftshader/third_party/subzero/unittest/AssemblerX8632/ |
| D | XmmArith.cpp | 1327 TEST_F(AssemblerX8632Test, Cvt) { in TEST_F() argument
|
| /external/swiftshader/third_party/subzero/unittest/AssemblerX8664/ |
| D | XmmArith.cpp | 1401 TEST_F(AssemblerX8664Test, Cvt) { in TEST_F() argument
|
| /external/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.cpp | 4484 SDValue Cvt; in ExpandBITCAST() local
4487 Cvt = DAG.getNode(ARMISD::VMOVRRD, dl, in ExpandBITCAST()
4491 Cvt = DAG.getNode(ARMISD::VMOVRRD, dl, in ExpandBITCAST()
4494 return DAG.getNode(ISD::BUILD_PAIR, dl, MVT::i64, Cvt, Cvt.getValue(1)); in ExpandBITCAST()
|
| /external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
| D | ARMISelLowering.cpp | 3233 SDValue Cvt = DAG.getNode(ARMISD::VMOVRRD, dl, in ExpandBITCAST() local
3236 return DAG.getNode(ISD::BUILD_PAIR, dl, MVT::i64, Cvt, Cvt.getValue(1)); in ExpandBITCAST()
|