Searched refs:CvtOpc (Results 1 – 8 of 8) sorted by relevance
| /external/llvm/lib/Target/Mips/ |
| D | MipsSEInstrInfo.h | 107 unsigned CvtOpc, unsigned MovOpc, bool IsI64) const;
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| D | MipsSEInstrInfo.cpp | 586 unsigned CvtOpc, unsigned MovOpc, in expandCvtFPInt() argument
588 const MCInstrDesc &CvtDesc = get(CvtOpc), &MovDesc = get(MovOpc); in expandCvtFPInt()
596 compareOpndSize(CvtOpc, *MBB.getParent()); in expandCvtFPInt()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/ |
| D | MipsSEInstrInfo.h | 110 unsigned CvtOpc, unsigned MovOpc, bool IsI64) const;
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| D | MipsSEInstrInfo.cpp | 744 unsigned CvtOpc, unsigned MovOpc, in expandCvtFPInt() argument
746 const MCInstrDesc &CvtDesc = get(CvtOpc), &MovDesc = get(MovOpc); in expandCvtFPInt()
754 compareOpndSize(CvtOpc, *MBB.getParent()); in expandCvtFPInt()
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| /external/llvm/lib/Target/X86/ |
| D | X86FastISel.cpp | 2847 static const uint16_t CvtOpc[2][2][2] = { in fastLowerIntrinsicCall() local
2857 case MVT::i32: Opc = CvtOpc[IsInputDouble][0][HasAVX]; break; in fastLowerIntrinsicCall()
2858 case MVT::i64: Opc = CvtOpc[IsInputDouble][1][HasAVX]; break; in fastLowerIntrinsicCall()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/ |
| D | X86FastISel.cpp | 3031 static const uint16_t CvtOpc[3][2][2] = { in fastLowerIntrinsicCall() local
3045 case MVT::i32: Opc = CvtOpc[AVXLevel][IsInputDouble][0]; break; in fastLowerIntrinsicCall()
3046 case MVT::i64: Opc = CvtOpc[AVXLevel][IsInputDouble][1]; break; in fastLowerIntrinsicCall()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/NVPTX/ |
| D | NVPTXISelDAGToDAG.cpp | 1685 unsigned CvtOpc = GetConvertOpcode(OrigType.getSimpleVT(), in tryLDGLDU() local
1695 CurDAG->getMachineNode(CvtOpc, DL, OrigType, Res, in tryLDGLDU()
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| /external/llvm/lib/Target/NVPTX/ |
| D | NVPTXISelDAGToDAG.cpp | 2097 unsigned CvtOpc = GetConvertOpcode(OrigType.getSimpleVT(), in tryLDGLDU() local
2107 CurDAG->getMachineNode(CvtOpc, DL, OrigType, Res, in tryLDGLDU()
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