Searched refs:CvtSrc (Results 1 – 2 of 2) sorted by relevance
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUISelLowering.cpp | 3604 SDValue CvtSrc = N0.getOperand(0); in performFNegCombine() local
3605 if (CvtSrc.getOpcode() == ISD::FNEG) { in performFNegCombine()
3608 return DAG.getNode(Opc, SL, VT, CvtSrc.getOperand(0)); in performFNegCombine()
3616 SDValue Neg = DAG.getNode(ISD::FNEG, SL, CvtSrc.getValueType(), CvtSrc); in performFNegCombine()
3620 SDValue CvtSrc = N0.getOperand(0); in performFNegCombine() local
3622 if (CvtSrc.getOpcode() == ISD::FNEG) { in performFNegCombine()
3625 CvtSrc.getOperand(0), N0.getOperand(1)); in performFNegCombine()
3632 SDValue Neg = DAG.getNode(ISD::FNEG, SL, CvtSrc.getValueType(), CvtSrc); in performFNegCombine()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/SelectionDAG/ |
| D | DAGCombiner.cpp | 10589 SDValue CvtSrc = N1.getOperand(0); in visitFSUBForFMACombine() local
10590 SDValue N100 = CvtSrc.getOperand(0); in visitFSUBForFMACombine()
10591 SDValue N101 = CvtSrc.getOperand(1); in visitFSUBForFMACombine()
10592 SDValue N102 = CvtSrc.getOperand(2); in visitFSUBForFMACombine()
10594 TLI.isFPExtFoldable(PreferredFusedOpcode, VT, CvtSrc.getValueType())) { in visitFSUBForFMACombine()
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