Searched refs:DDR3PHY_CTRL_PHY_RESET (Results 1 – 2 of 2) sorted by relevance
| /external/u-boot/arch/arm/mach-exynos/ | ||
| D | exynos5_setup.h | 251 #define DDR3PHY_CTRL_PHY_RESET (1 << 0) macro |
| D | dmc_init_ddr3.c | 32 writel(DDR3PHY_CTRL_PHY_RESET, &clk->lpddr3phy_ctrl); in reset_phy_ctrl() |