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Searched refs:DDRC1 (Results 1 – 5 of 5) sorted by relevance

/external/u-boot/arch/arm/dts/
Dstm32mp15-ddr.dtsi17 <&rcc_clk DDRC1>,
/external/u-boot/include/dt-bindings/clock/
Dstm32mp1-clks.h230 #define DDRC1 203 macro
/external/u-boot/doc/
DREADME.b4860qds65 - DDRC1: Ten separate DDR3 parts of 16-bit to support 72-bit (ECC) at 1866MT/s, ECC, 4 GB
194 0x0_8000_0000 0x0_FFFF_FFFF DDRC1 2 GB
224 0x0_0000_0000 0x0_FFFF_FFFF DDRC1 4 GB
/external/u-boot/doc/device-tree-bindings/ram/
Dst,stm32mp1-ddr.txt162 <&rcc_clk DDRC1>,
/external/u-boot/drivers/clk/
Dclk_stm32mp1.c487 STM32MP1_CLK(RCC_DDRITFCR, 0, DDRC1, _UNKNOWN_SEL),