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Searched refs:DDR_CTRL_UPD_EMR2S (Results 1 – 2 of 2) sorted by relevance

/external/u-boot/arch/mips/mach-ath79/qca953x/
Dddr.c15 #define DDR_CTRL_UPD_EMR2S BIT(4) macro
301 writel(DDR_CTRL_UPD_EMR2S, regs + AR71XX_DDR_REG_CONTROL); in ddr_init()
340 writel(DDR_CTRL_UPD_EMR2S, regs + AR71XX_DDR_REG_CONTROL); in ddr_init()
/external/u-boot/arch/mips/mach-ath79/ar933x/
Dddr.c15 #define DDR_CTRL_UPD_EMR2S BIT(4) macro
129 writel(DDR_CTRL_UPD_EMR2S, regs + AR71XX_DDR_REG_CONTROL); in ddr_init()