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Searched refs:DDR_CTRL_UPD_MRS (Results 1 – 2 of 2) sorted by relevance

/external/u-boot/arch/mips/mach-ath79/ar933x/
Dddr.c19 #define DDR_CTRL_UPD_MRS BIT(0) macro
146 writel(DDR_CTRL_UPD_MRS, regs + AR71XX_DDR_REG_CONTROL); in ddr_init()
158 writel(DDR_CTRL_UPD_MRS, regs + AR71XX_DDR_REG_CONTROL); in ddr_init()
198 writel(DDR_CTRL_UPD_MRS, regs + AR71XX_DDR_REG_CONTROL); in ddr_init()
213 writel(DDR_CTRL_UPD_MRS, regs + AR71XX_DDR_REG_CONTROL); in ddr_init()
/external/u-boot/arch/mips/mach-ath79/qca953x/
Dddr.c19 #define DDR_CTRL_UPD_MRS BIT(0) macro
270 writel(DDR_CTRL_UPD_MRS, regs + AR71XX_DDR_REG_CONTROL); in ddr_init()
288 writel(DDR_CTRL_UPD_MRS, regs + AR71XX_DDR_REG_CONTROL); in ddr_init()
360 writel(DDR_CTRL_UPD_MRS, regs + AR71XX_DDR_REG_CONTROL); in ddr_init()
378 writel(DDR_CTRL_UPD_MRS, regs + AR71XX_DDR_REG_CONTROL); in ddr_init()