Searched refs:DEBUG_MAIN_FULL_C (Results 1 – 1 of 1) sorted by relevance
| /external/u-boot/drivers/ddr/marvell/axp/ |
| D | ddr3_hw_training.c | 32 #define DEBUG_MAIN_FULL_C(s, d, l) \ macro
489 DEBUG_MAIN_FULL_C("Max WL Phase: ", dram_info->wl_max_phase, 2); in ddr3_set_performance_params()
490 DEBUG_MAIN_FULL_C("Min WL Phase: ", dram_info->wl_min_phase, 2); in ddr3_set_performance_params()
491 DEBUG_MAIN_FULL_C("Max RL Phase: ", dram_info->rl_max_phase, 2); in ddr3_set_performance_params()
492 DEBUG_MAIN_FULL_C("Min RL Phase: ", dram_info->rl_min_phase, 2); in ddr3_set_performance_params()
514 DEBUG_MAIN_FULL_C("WR 2 WR: ", twr2wr, 2); in ddr3_set_performance_params()
515 DEBUG_MAIN_FULL_C("RD 2 RD: ", trd2rd, 2); in ddr3_set_performance_params()
516 DEBUG_MAIN_FULL_C("RD 2 WR / WR 2 RD: ", trd2wr_wr2rd, 2); in ddr3_set_performance_params()
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