Searched refs:DEBUG_RD_REG (Results 1 – 4 of 4) sorted by relevance
/external/u-boot/arch/arm/mach-mvebu/serdes/axp/ |
D | high_speed_env_lib.c | 305 DEBUG_RD_REG(CPU_AVS_CONTROL2_REG, cpu_avs); in serdes_phy_config() 312 DEBUG_RD_REG(CPU_AVS_CONTROL0_REG, tmp2); in serdes_phy_config() 325 DEBUG_RD_REG(CORE_AVS_CONTROL_0REG, core_avs); in serdes_phy_config() 337 DEBUG_RD_REG(CORE_AVS_CONTROL_2REG, core_avs); in serdes_phy_config() 343 DEBUG_RD_REG(GENERAL_PURPOSE_RESERVED0_REG, in serdes_phy_config() 453 DEBUG_RD_REG(SATA_LP_PHY_EXT_CTRL_REG(sata_port), tmp); in serdes_phy_config() 468 DEBUG_RD_REG(SGMII_SERDES_CFG_REG(0), tmp); in serdes_phy_config() 488 DEBUG_RD_REG(SGMII_SERDES_CFG_REG(sgmii_port), tmp); in serdes_phy_config() 503 DEBUG_RD_REG(QSGMII_CONTROL_1_REG, tmp); in serdes_phy_config() 633 DEBUG_RD_REG(SOC_CTRL_REG, tmp); in serdes_phy_config() [all …]
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/external/u-boot/drivers/ddr/marvell/a38x/ |
D | ddr_ml_wrapper.h | 43 #define DEBUG_RD_REG(reg, val) \ macro 51 #define DEBUG_RD_REG(reg, val) macro
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/external/u-boot/drivers/ddr/marvell/axp/ |
D | ddr3_init.h | 36 #define DEBUG_RD_REG(reg, val) \ macro 44 #define DEBUG_RD_REG(reg, val) macro
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/external/u-boot/arch/arm/mach-mvebu/serdes/a38x/ |
D | ctrl_pex.c | 172 DEBUG_RD_REG(PEX_LINK_CTRL_STATUS2_REG(pex_idx), tmp); in hws_pex_config() 180 DEBUG_RD_REG(PEX_CTRL_REG(pex_idx), tmp); in hws_pex_config()
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