Searched refs:DIV_S (Results 1 – 10 of 10) sorted by relevance
| /external/llvm/lib/Target/WebAssembly/ |
| D | WebAssemblyInstrInteger.td | 26 defm DIV_S : BinaryInt<sdiv, "div_s">;
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/WebAssembly/ |
| D | WebAssemblyInstrInteger.td | 26 defm DIV_S : BinaryInt<sdiv, "div_s", 0x6d, 0x7f>;
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| /external/v8/src/compiler/mips/ |
| D | instruction-scheduler-mips.cc | 402 DIV_S = 17, enumerator
1717 return Latency::DIV_S; in GetInstructionLatency()
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| /external/v8/src/compiler/mips64/ |
| D | instruction-scheduler-mips64.cc | 435 DIV_S = 17, enumerator
1426 return Latency::DIV_S; in GetInstructionLatency()
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| /external/v8/src/mips/ |
| D | constants-mips.h | 603 DIV_S = ((0U << 3) + 3), enumerator
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| D | assembler-mips.cc | 2819 GenInstrRegister(COP1, S, ft, fs, fd, DIV_S); in div_s()
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| D | simulator-mips.cc | 3232 case DIV_S: in DecodeTypeRegisterSRsType()
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| /external/pcre/dist2/src/sljit/ |
| D | sljitNativeMIPS_common.c | 138 #define DIV_S (HI(17) | FMT_S | LO(3)) macro
1532 FAIL_IF(push_inst(compiler, DIV_S | FMT(op) | FT(src2) | FS(src1) | FD(dst_r), MOVABLE_INS)); in sljit_emit_fop2()
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| /external/v8/src/mips64/ |
| D | constants-mips64.h | 634 DIV_S = ((0U << 3) + 3), enumerator
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| D | simulator-mips64.cc | 2685 case DIV_S: in DecodeTypeRegisterSRsType()
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