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Searched refs:DMA (Results 1 – 25 of 91) sorted by relevance

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/external/u-boot/drivers/dma/
DKconfig1 menu "DMA Support"
3 config DMA config
4 bool "Enable Driver Model for DMA drivers"
7 Enable driver model for DMA. DMA engines can do
11 etc Drivers provide methods to access the DMA devices
23 bool "Support APBH DMA"
26 Enable APBH DMA driver.
30 bool "Enable DMA BURST"
33 bool "Enable DMA BURST8"
37 endmenu # menu "DMA Support"
/external/u-boot/doc/
DREADME.arm-caches20 Memory to Peripheral DMA:
21 - Flush the buffer after the MPU writes the data and before the DMA is
24 Peripheral to Memory DMA:
25 - Invalidate the buffer before starting the DMA. In case there are any dirty
26 lines from the DMA buffer in the cache, subsequent cache-line replacements
27 may corrupt the buffer in memory while the DMA is still going on. Cache-line
29 into the cache while the DMA is going on.
30 - Invalidate the buffer after the DMA is complete and before the MPU reads
31 it. This may be needed in addition to the invalidation before the DMA
34 happens with the DMA buffer while DMA is going on we have a coherency problem.
[all …]
DREADME.fsl-trustzone-components23 such as processors and DMA-equipped peripherals.
/external/clang/test/SemaCXX/
Dwarn-reinterpret-base-class.cpp23 class DMA : public virtual A, public virtual DA { //expected-warning{{direct base 'A' is inaccessib… class
133 (void)*reinterpret_cast<DMA *>(a); in reinterpret_pointer_downcast()
166 (void)reinterpret_cast<DMA &>(a); in reinterpret_reference_downcast()
171 DAi *dai, DVA *dva, DDVA *ddva, DMA *dma) { in reinterpret_pointer_upcast()
211 DAi &dai, DVA &dva, DDVA &ddva, DMA &dma) { in reinterpret_reference_upcast()
/external/u-boot/doc/device-tree-bindings/serial/
Domap_serial.txt19 - dmas : DMA specifier, consisting of a phandle to the DMA controller
20 node and a DMA channel number.
/external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/Analysis/
DMemorySSA.h282 MemoryUseOrDef(LLVMContext &C, MemoryAccess *DMA, unsigned Vty,
286 setDefiningAccess(DMA);
296 void setDefiningAccess(MemoryAccess *DMA, bool Optimized = false,
299 setOperand(0, DMA);
302 setOptimized(DMA);
325 MemoryUse(LLVMContext &C, MemoryAccess *DMA, Instruction *MI, BasicBlock *BB)
326 : MemoryUseOrDef(C, DMA, MemoryUseVal, deleteMe, MI, BB) {}
337 void setOptimized(MemoryAccess *DMA) {
338 OptimizedID = DMA->getID();
339 setOperand(0, DMA);
[all …]
/external/u-boot/doc/device-tree-bindings/net/
Dstmmac.txt21 - snps,fixed-burst Program the DMA to use the fixed burst mode
22 - snps,mixed-burst Program the DMA to use the mixed burst mode
23 - snps,force_thresh_dma_mode Force DMA to use the threshold mode for
25 - snps,force_sf_dma_mode Force DMA to use the Store and Forward
Dsnps,dwc-qos-ethernet.txt116 - snps,txpbl: DMA Programmable burst length for the TX DMA
117 - snps,rxpbl: DMA Programmable burst length for the RX DMA
/external/llvm/include/llvm/Transforms/Utils/
DMemorySSA.h225 MemoryUseOrDef(LLVMContext &C, MemoryAccess *DMA, unsigned Vty,
228 setDefiningAccess(DMA);
231 void setDefiningAccess(MemoryAccess *DMA) { setOperand(0, DMA); }
256 MemoryUse(LLVMContext &C, MemoryAccess *DMA, Instruction *MI, BasicBlock *BB)
257 : MemoryUseOrDef(C, DMA, MemoryUseVal, MI, BB) {}
296 MemoryDef(LLVMContext &C, MemoryAccess *DMA, Instruction *MI, BasicBlock *BB,
298 : MemoryUseOrDef(C, DMA, MemoryDefVal, MI, BB), ID(Ver) {}
/external/u-boot/board/freescale/m547xevb/
DREADME29 - drivers/dma/MCD_dmaApi.c DMA API functions
30 - drivers/dma/MCD_tasks.c DMA Tasks
31 - drivers/dma/MCD_tasksInit.c DMA Tasks Init
32 - drivers/net/fsl_mcdmafec.c ColdFire common DMA FEC driver
35 - include/MCD_dma.h DMA header file
36 - include/MCD_progCheck.h DMA header file
37 - include/MCD_tasksInit.h DMA header file
43 - include/asm-m68k/fsl_mcddmafec.h DMA FEC structure and definition
/external/u-boot/lib/efi_loader/
DKconfig21 bool "EFI Applications use bounce buffers for DMA operations"
25 Some hardware does not support DMA to full 64bit addresses. For this
/external/u-boot/arch/arm/dts/
Dsama5d3xmb_cmp.dtsi32 dmas = <0>, <0>; /* Do not use DMA for spi0 */
83 dmas = <0>, <0>; /* Do not use DMA for usart1 */
181 dmas = <0>, <0>; /* Do not use DMA for dbgu */
Dsama5d3xmb.dtsi34 dmas = <0>, <0>; /* Do not use DMA for spi0 */
87 dmas = <0>, <0>; /* Do not use DMA for usart1 */
184 dmas = <0>, <0>; /* Do not use DMA for dbgu */
/external/u-boot/drivers/usb/musb-new/
DKconfig60 bool "Disable DMA (always use PIO)"
64 DMA controllers are ignored.
/external/wayland-protocols/freedesktop.org/unstable/linux-dmabuf/
DREADME1 Linux DMA-BUF protocol
/external/syzkaller/pkg/report/testdata/linux/report/
D19951 [ 81.429161] Node 0 DMA free:15904kB min:324kB low:404kB high:484kB active_anon:0kB inactive_anon…
57 [ 81.429270] Node 0 DMA: 0*4kB 0*8kB 0*16kB 1*32kB (U) 2*64kB (U) 1*128kB (U) 1*256kB (U) 0*512kB…
140 [ 81.863432] Node 0 DMA free:15904kB min:324kB low:404kB high:484kB active_anon:0kB inactive_anon…
146 [ 81.863541] Node 0 DMA: 0*4kB 0*8kB 0*16kB 1*32kB (U) 2*64kB (U) 1*128kB (U) 1*256kB (U) 0*512kB…
/external/u-boot/arch/arm/mach-sunxi/
Ddram_sunxi_dw.c123 MBUS_CONF( DMA, true, HIGHEST, 0, 256, 128, 32); in mctl_set_master_priority_h3()
148 MBUS_CONF( DMA, true, HIGH, 0, 256, 80, 100); in mctl_set_master_priority_a64()
178 MBUS_CONF( DMA, true, HIGHEST, 0, 256, 128, 32); in mctl_set_master_priority_h5()
206 MBUS_CONF( DMA, true, HIGHEST, 0, 256, 128, 32); in mctl_set_master_priority_r40()
/external/perfetto/src/traced/probes/ftrace/test/data/android_walleye_OPM5.171019.017.A1_4.4.88/events/compaction/mm_compaction_kcompactd_wake/
Dformat13 …idx=%-8s", REC->nid, REC->order, __print_symbolic(REC->classzone_idx, {0, "DMA"}, {1, "Normal"}, {…
/external/perfetto/src/traced/probes/ftrace/test/data/android_walleye_OPM5.171019.017.A1_4.4.88/events/compaction/mm_compaction_wakeup_kcompactd/
Dformat13 …idx=%-8s", REC->nid, REC->order, __print_symbolic(REC->classzone_idx, {0, "DMA"}, {1, "Normal"}, {…
/external/perfetto/src/traced/probes/ftrace/test/data/android_walleye_OPM5.171019.017.A1_4.4.88/events/compaction/mm_compaction_suitable/
Dformat14 print fmt: "node=%d zone=%-8s order=%d ret=%s", REC->nid, __print_symbolic(REC->idx, {0, "DMA"}, {1…
/external/perfetto/src/traced/probes/ftrace/test/data/android_walleye_OPM5.171019.017.A1_4.4.88/events/compaction/mm_compaction_finished/
Dformat14 print fmt: "node=%d zone=%-8s order=%d ret=%s", REC->nid, __print_symbolic(REC->idx, {0, "DMA"}, {1…
/external/perfetto/src/traced/probes/ftrace/test/data/android_walleye_OPM5.171019.017.A1_4.4.88/events/compaction/mm_compaction_defer_reset/
Dformat16 …ailed=%d consider=%u limit=%lu", REC->nid, __print_symbolic(REC->idx, {0, "DMA"}, {1, "Normal"}, {…
/external/perfetto/src/traced/probes/ftrace/test/data/android_walleye_OPM5.171019.017.A1_4.4.88/events/compaction/mm_compaction_deferred/
Dformat16 …ailed=%d consider=%u limit=%lu", REC->nid, __print_symbolic(REC->idx, {0, "DMA"}, {1, "Normal"}, {…
/external/perfetto/src/traced/probes/ftrace/test/data/android_walleye_OPM5.171019.017.A1_4.4.88/events/compaction/mm_compaction_defer_compaction/
Dformat16 …ailed=%d consider=%u limit=%lu", REC->nid, __print_symbolic(REC->idx, {0, "DMA"}, {1, "Normal"}, {…
/external/u-boot/arch/arm/mach-socfpga/
Dspl.c57 socfpga_per_reset(SOCFPGA_RESET(DMA), 0); in spl_boot_device()

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