Searched refs:DMask (Results 1 – 9 of 9) sorted by relevance
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/Disassembler/ |
| D | AMDGPUDisassembler.cpp | 314 unsigned DMask = MI.getOperand(DMaskIdx).getImm() & 0xf; in convertMIMGInst() local
315 if (DMask == 0) in convertMIMGInst()
318 unsigned DstSize = IsGather4 ? 4 : countPopulation(DMask); in convertMIMGInst()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
| D | MIMGInstructions.td | 143 DMask:$dmask, UNorm:$unorm, GLC:$glc, SLC:$slc,
201 DMask:$dmask, UNorm:$unorm, GLC:$glc, SLC:$slc,
254 DMask:$dmask, UNorm:$unorm, GLC:$glc, SLC:$slc,
318 DMask:$dmask, UNorm:$unorm, GLC:$glc, SLC:$slc,
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| D | SIInstrInfo.td | 758 def DMask : NamedOperandU16<"DMask", NamedMatchClass<"DMask">>;
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| D | SIISelLowering.cpp | 4567 unsigned DMask; in lowerImage() local
4581 DMask = Is64Bit ? 0xf : 0x3; in lowerImage()
4585 DMask = Is64Bit ? 0x3 : 0x1; in lowerImage()
4628 DMask = DMaskConst->getZExtValue(); in lowerImage()
4629 if (!DMask && !BaseOpcode->Store) { in lowerImage()
4700 Ops.push_back(DAG.getTargetConstant(DMask, DL, MVT::i32)); in lowerImage()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/AsmParser/ |
| D | AMDGPUAsmParser.cpp | 2396 unsigned DMask = Inst.getOperand(DMaskIdx).getImm() & 0xf; in validateMIMGDataSize() local
2397 if (DMask == 0) in validateMIMGDataSize()
2398 DMask = 1; in validateMIMGDataSize()
2401 (Desc.TSFlags & SIInstrFlags::Gather4) ? 4 : countPopulation(DMask); in validateMIMGDataSize()
2422 unsigned DMask = Inst.getOperand(DMaskIdx).getImm() & 0xf; in validateMIMGAtomicDMask() local
2428 return DMask == 0x1 || DMask == 0x3 || DMask == 0xf; in validateMIMGAtomicDMask()
2440 unsigned DMask = Inst.getOperand(DMaskIdx).getImm() & 0xf; in validateMIMGGatherDMask() local
2447 return DMask == 0x1 || DMask == 0x2 || DMask == 0x4 || DMask == 0x8; in validateMIMGGatherDMask()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Transforms/InstCombine/ |
| D | InstCombineSimplifyDemanded.cpp | 938 ConstantInt *DMask = dyn_cast<ConstantInt>(II->getArgOperand(DMaskIdx)); in simplifyAMDGCNMemoryIntrinsicDemanded() local
939 if (!DMask) in simplifyAMDGCNMemoryIntrinsicDemanded()
942 unsigned DMaskVal = DMask->getZExtValue() & 0xf; in simplifyAMDGCNMemoryIntrinsicDemanded()
959 NewDMask = ConstantInt::get(DMask->getType(), NewDMaskVal); in simplifyAMDGCNMemoryIntrinsicDemanded()
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| /external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/IR/ |
| D | IntrinsicsAMDGPU.td | 648 // Marker class for intrinsics with a DMask that determines the returned
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| /external/llvm/lib/Target/AMDGPU/ |
| D | SIInstrInfo.td | 561 def dmask : NamedOperandU16<"DMask", NamedMatchClass<"DMask">>;
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 30854 int DMask[] = {0, 1, 2, 3}; in combineTargetShuffle() local
30856 DMask[DOffset + 0] = DOffset + 1; in combineTargetShuffle()
30857 DMask[DOffset + 1] = DOffset + 0; in combineTargetShuffle()
30861 getV4X86ShuffleImm8ForMask(DMask, DL, DAG)); in combineTargetShuffle()
30876 SmallVector<int, 4> DMask = getPSHUFShuffleMask(D); in combineTargetShuffle() local
30887 MappedMask[i] = 2 * DMask[WordMask[i] / 2] + WordMask[i] % 2; in combineTargetShuffle()
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