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Searched refs:DRAMTMG0_TFAW (Results 1 – 4 of 4) sorted by relevance

/external/u-boot/arch/arm/mach-sunxi/dram_timings/
Dlpddr3_stock.c53 writel(DRAMTMG0_TWTP(twtp) | DRAMTMG0_TFAW(tfaw) | in mctl_set_timing_params()
Dddr2_v3s.c54 writel(DRAMTMG0_TWTP(twtp) | DRAMTMG0_TFAW(tfaw) | in mctl_set_timing_params()
Dddr3_1333.c57 writel(DRAMTMG0_TWTP(twtp) | DRAMTMG0_TFAW(tfaw) | in mctl_set_timing_params()
/external/u-boot/arch/arm/include/asm/arch-sunxi/
Ddram_sunxi_dw.h155 #define DRAMTMG0_TFAW(x) ((x) << 16) macro