Searched refs:DSrc (Results 1 – 2 of 2) sorted by relevance
/external/llvm/lib/Target/ARM/ |
D | ARMBaseInstrInfo.cpp | 4374 unsigned DstLane = 0, SrcLane = 0, DDst, DSrc; in setExecutionDomain() local 4376 DSrc = getCorrespondingDRegAndLane(TRI, SrcReg, SrcLane); in setExecutionDomain() 4379 if (!getImplicitSPRUseForDPRUse(TRI, MI, DSrc, SrcLane, ImplicitSReg)) in setExecutionDomain() 4385 if (DSrc == DDst) { in setExecutionDomain() 4422 unsigned CurReg = SrcLane == 1 && DstLane == 1 ? DSrc : DDst; in setExecutionDomain() 4426 CurReg = SrcLane == 0 && DstLane == 0 ? DSrc : DDst; in setExecutionDomain() 4441 CurReg = SrcLane == 1 && DstLane == 0 ? DSrc : DDst; in setExecutionDomain() 4442 CurUndef = CurReg == DSrc && !MI.readsRegister(CurReg, TRI); in setExecutionDomain() 4445 CurReg = SrcLane == 0 && DstLane == 1 ? DSrc : DDst; in setExecutionDomain() 4446 CurUndef = CurReg == DSrc && !MI.readsRegister(CurReg, TRI); in setExecutionDomain()
|
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/ |
D | ARMBaseInstrInfo.cpp | 4772 unsigned DstLane = 0, SrcLane = 0, DDst, DSrc; in setExecutionDomain() local 4774 DSrc = getCorrespondingDRegAndLane(TRI, SrcReg, SrcLane); in setExecutionDomain() 4777 if (!getImplicitSPRUseForDPRUse(TRI, MI, DSrc, SrcLane, ImplicitSReg)) in setExecutionDomain() 4783 if (DSrc == DDst) { in setExecutionDomain() 4820 unsigned CurReg = SrcLane == 1 && DstLane == 1 ? DSrc : DDst; in setExecutionDomain() 4824 CurReg = SrcLane == 0 && DstLane == 0 ? DSrc : DDst; in setExecutionDomain() 4838 CurReg = SrcLane == 1 && DstLane == 0 ? DSrc : DDst; in setExecutionDomain() 4839 CurUndef = CurReg == DSrc && !MI.readsRegister(CurReg, TRI); in setExecutionDomain() 4842 CurReg = SrcLane == 0 && DstLane == 1 ? DSrc : DDst; in setExecutionDomain() 4843 CurUndef = CurReg == DSrc && !MI.readsRegister(CurReg, TRI); in setExecutionDomain()
|