Searched refs:DW_OP_reg2 (Results 1 – 16 of 16) sorted by relevance
| /external/swiftshader/third_party/llvm-7.0/llvm/test/DebugInfo/X86/ |
| D | dbg-value-regmask-clobber.ll | 20 ; ASM-NEXT: .byte 82 # super-register DW_OP_reg2
26 ; DWARF-NEXT: [0x0000000000000000, 0x0000000000000013): DW_OP_reg2 RCX)
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| /external/elfutils/backends/ |
| D | i386_retval.c | 44 { .atom = DW_OP_reg2 }, { .atom = DW_OP_piece, .number = 4 },
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| D | arm_retval.c | 45 { .atom = DW_OP_reg2 }, { .atom = DW_OP_piece, .number = 4 },
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| D | s390_retval.c | 43 { .atom = DW_OP_reg2 }, { .atom = DW_OP_piece, .number = 4 },
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| /external/libunwind_llvm/src/ |
| D | dwarf2.h | 160 DW_OP_reg2 = 0x52, // Contents of reg2 enumerator
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| D | DwarfInstructions.hpp | 649 case DW_OP_reg2: in evaluateExpression()
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| /external/swiftshader/third_party/llvm-7.0/llvm/test/DebugInfo/ARM/ |
| D | PR16736.ll | 14 ; DWARF-NEXT: DW_OP_reg2 R2
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| /external/google-breakpad/src/common/dwarf/ |
| D | dwarf2enums.h | 414 DW_OP_reg2 =0x52, enumerator
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| /external/llvm/test/DebugInfo/X86/ |
| D | dbg-value-regmask-clobber.ll | 20 ; ASM-NEXT: .byte 82 # super-register DW_OP_reg2
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| /external/libunwind/include/ |
| D | dwarf.h | 110 DW_OP_reg1, DW_OP_reg2, DW_OP_reg3, DW_OP_reg4, DW_OP_reg5, enumerator
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| /external/swiftshader/third_party/LLVM/lib/Support/ |
| D | Dwarf.cpp | 366 case DW_OP_reg2: return "DW_OP_reg2"; in OperationEncodingString()
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| /external/swiftshader/third_party/LLVM/include/llvm/Support/ |
| D | Dwarf.h | 377 DW_OP_reg2 = 0x52, enumerator
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| /external/elfutils/libdw/ |
| D | dwarf.h | 502 DW_OP_reg2 = 0x52, /* Register 2. */ enumerator
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| D | known-dwarf.h | 510 DWARF_ONE_KNOWN_DW_OP (reg2, DW_OP_reg2) \
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| /external/libunwind/src/dwarf/ |
| D | Gexpr.c | 310 case DW_OP_reg0: case DW_OP_reg1: case DW_OP_reg2: in dwarf_eval_expr()
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| /external/v8/src/ |
| D | gdb-jit.cc | 1080 DW_OP_reg2 = 0x52, enumerator
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