Searched refs:DecodeVPERMMask (Results 1 – 7 of 7) sorted by relevance
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/Utils/ |
D | X86ShuffleDecode.h | 127 void DecodeVPERMMask(unsigned NumElts, unsigned Imm,
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D | X86ShuffleDecode.cpp | 379 void DecodeVPERMMask(unsigned NumElts, unsigned Imm, in DecodeVPERMMask() function
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/external/llvm/lib/Target/X86/Utils/ |
D | X86ShuffleDecode.h | 112 void DecodeVPERMMask(MVT VT, unsigned Imm, SmallVectorImpl<int> &ShuffleMask);
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D | X86ShuffleDecode.cpp | 399 void DecodeVPERMMask(MVT VT, unsigned Imm, SmallVectorImpl<int> &ShuffleMask) { in DecodeVPERMMask() function
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/external/llvm/lib/Target/X86/InstPrinter/ |
D | X86InstComments.cpp | 855 DecodeVPERMMask(getRegOperandVectorVT(MI, MVT::f64, 0), in EmitAnyX86InstComments() 866 DecodeVPERMMask(getRegOperandVectorVT(MI, MVT::i64, 0), in EmitAnyX86InstComments()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/InstPrinter/ |
D | X86InstComments.cpp | 1054 DecodeVPERMMask(getRegOperandNumElts(MI, 64, 0), in EmitAnyX86InstComments() 1066 DecodeVPERMMask(getRegOperandNumElts(MI, 64, 0), in EmitAnyX86InstComments()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/ |
D | X86ISelLowering.cpp | 5926 DecodeVPERMMask(NumElems, cast<ConstantSDNode>(ImmN)->getZExtValue(), Mask); in getTargetShuffleMask()
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