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Searched refs:DispatchIDReg (Results 1 – 2 of 2) sorted by relevance

/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/
DAMDGPUCallLowering.cpp137 unsigned DispatchIDReg = Info->addDispatchID(*TRI); in lowerFormalArguments() local
139 CCInfo.AllocateReg(DispatchIDReg); in lowerFormalArguments()
DSIISelLowering.cpp1554 unsigned DispatchIDReg = Info.addDispatchID(TRI); in allocateHSAUserSGPRs() local
1555 MF.addLiveIn(DispatchIDReg, &AMDGPU::SGPR_64RegClass); in allocateHSAUserSGPRs()
1556 CCInfo.AllocateReg(DispatchIDReg); in allocateHSAUserSGPRs()