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Searched refs:DispatchWidth (Results 1 – 9 of 9) sorted by relevance

/external/swiftshader/third_party/llvm-7.0/llvm/tools/llvm-mca/
DDispatchStage.cpp95 if (NumMicroOps > DispatchWidth) { in dispatch()
96 assert(AvailableEntries == DispatchWidth); in dispatch()
98 CarryOver = NumMicroOps - DispatchWidth; in dispatch()
135 AvailableEntries = CarryOver >= DispatchWidth ? 0 : DispatchWidth - CarryOver; in cycleStart()
136 CarryOver = CarryOver >= DispatchWidth ? CarryOver - DispatchWidth : 0U; in cycleStart()
DDispatchStage.h53 unsigned DispatchWidth; variable
71 return NumEntries <= AvailableEntries || AvailableEntries == DispatchWidth; in isAvailable()
89 : DispatchWidth(MaxDispatchWidth), AvailableEntries(MaxDispatchWidth), in DispatchStage()
DSummaryView.cpp29 : SM(Model), Source(S), DispatchWidth(Width), TotalCycles(0), in SummaryView()
68 SM, DispatchWidth, NumMicroOps, ProcResourceUsage); in printView()
75 TempStream << "\nDispatch Width: " << DispatchWidth; in printView()
DContext.h36 : DispatchWidth(DW), RegisterFileSize(RFS), LoadQueueSize(LQS), in PipelineOptions()
38 unsigned DispatchWidth; member
DSupport.cpp52 double computeBlockRThroughput(const MCSchedModel &SM, unsigned DispatchWidth, in computeBlockRThroughput() argument
58 double Max = static_cast<double>(NumMicroOps) / DispatchWidth; in computeBlockRThroughput()
DSupport.h54 unsigned DispatchWidth, unsigned NumMicroOps,
DSummaryView.h44 const unsigned DispatchWidth; variable
DContext.cpp46 STI, MRI, Opts.RegisterFileSize, Opts.DispatchWidth, *RCU, *PRF, *HWS); in createDefaultPipeline()
Dllvm-mca.cpp94 DispatchWidth("dispatch", cl::desc("Override the processor dispatch width"), variable
460 if (DispatchWidth) in main()
461 Width = DispatchWidth; in main()