Searched refs:DstRB (Results 1 – 3 of 3) sorted by relevance
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/ |
D | AArch64RegisterBankInfo.cpp | 498 const RegisterBank *DstRB = getRegBank(DstReg, MRI, TRI); in getInstrMapping() local 500 if (!DstRB) in getInstrMapping() 501 DstRB = SrcRB; in getInstrMapping() 503 SrcRB = DstRB; in getInstrMapping() 506 assert(DstRB && SrcRB && "Both RegBank were nullptr"); in getInstrMapping() 509 DefaultMappingID, copyCost(*DstRB, *SrcRB, Size), in getInstrMapping() 510 getCopyMapping(DstRB->getID(), SrcRB->getID(), Size), in getInstrMapping() 523 const RegisterBank &DstRB = in getInstrMapping() local 528 DefaultMappingID, copyCost(DstRB, SrcRB, Size), in getInstrMapping() 529 getCopyMapping(DstRB.getID(), SrcRB.getID(), Size), in getInstrMapping()
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D | AArch64InstructionSelector.cpp | 1155 const RegisterBank &DstRB = *RBI.getRegBank(DstReg, MRI, TRI); in select() local 1158 if (DstRB.getID() != SrcRB.getID()) { in select() 1164 if (DstRB.getID() == AArch64::GPRRegBankID) { in select() 1166 getRegClassForTypeOnBank(DstTy, DstRB, RBI); in select() 1198 } else if (DstRB.getID() == AArch64::FPRRegBankID) { in select() 1504 const RegisterBank &DstRB = *RBI.getRegBank(DstReg, MRI, TRI); in select() local 1506 getRegClassForTypeOnBank(DstTy, DstRB, RBI); in select()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/ |
D | X86InstructionSelector.cpp | 699 const RegisterBank &DstRB = *RBI.getRegBank(DstReg, MRI, TRI); in selectTruncOrPtrToInt() local 702 if (DstRB.getID() != SrcRB.getID()) { in selectTruncOrPtrToInt() 708 const TargetRegisterClass *DstRC = getRegClass(DstTy, DstRB); in selectTruncOrPtrToInt() 720 if (DstRB.getID() != X86::GPRRegBankID) in selectTruncOrPtrToInt() 788 const RegisterBank &DstRB = *RBI.getRegBank(DstReg, MRI, TRI); in selectZext() local 790 const TargetRegisterClass *DstRC = getRegClass(DstTy, DstRB); in selectZext() 874 const RegisterBank &DstRB = *RBI.getRegBank(DstReg, MRI, TRI); in selectAnyext() local 877 assert(DstRB.getID() == SrcRB.getID() && in selectAnyext() 883 const TargetRegisterClass *DstRC = getRegClass(DstTy, DstRB); in selectAnyext() 892 if (DstRB.getID() != X86::GPRRegBankID) in selectAnyext() [all …]
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