Searched refs:EXCEPTIONADDR (Results 1 – 9 of 9) sorted by relevance
| /external/swiftshader/third_party/LLVM/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 82 EXCEPTIONADDR, enumerator
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| /external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/ |
| D | FastISel.cpp | 586 if (TLI.getOperationAction(ISD::EXCEPTIONADDR, VT)!=TargetLowering::Expand) in SelectCall()
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| D | SelectionDAGBuilder.cpp | 1847 SDValue Op1 = DAG.getNode(ISD::EXCEPTIONADDR, getCurDebugLoc(), VTs, Ops, 1); in visitLandingPad()
4677 SDValue Op = DAG.getNode(ISD::EXCEPTIONADDR, dl, VTs, Ops, 1); in visitIntrinsicCall()
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| D | LegalizeDAG.cpp | 3425 case ISD::EXCEPTIONADDR: { in ExpandNode()
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| D | SelectionDAG.cpp | 5913 case ISD::EXCEPTIONADDR: return "EXCEPTIONADDR"; in getOperationName()
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| /external/swiftshader/third_party/LLVM/lib/Target/Mips/ |
| D | MipsISelLowering.cpp | 184 setOperationAction(ISD::EXCEPTIONADDR, MVT::i32, Expand); in MipsTargetLowering()
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| /external/swiftshader/third_party/LLVM/lib/Target/PowerPC/ |
| D | PPCISelLowering.cpp | 191 setOperationAction(ISD::EXCEPTIONADDR, MVT::i64, Expand); in PPCTargetLowering()
193 setOperationAction(ISD::EXCEPTIONADDR, MVT::i32, Expand); in PPCTargetLowering()
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| /external/swiftshader/third_party/LLVM/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 505 setOperationAction(ISD::EXCEPTIONADDR, MVT::i64, Expand); in X86TargetLowering()
507 setOperationAction(ISD::EXCEPTIONADDR, MVT::i32, Expand); in X86TargetLowering()
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| /external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
| D | ARMISelLowering.cpp | 610 setOperationAction(ISD::EXCEPTIONADDR, MVT::i32, Expand); in ARMTargetLowering()
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