Searched refs:EXYNOS4_MIU_BASE (Results 1 – 2 of 2) sorted by relevance
| /external/u-boot/arch/arm/mach-exynos/ |
| D | dmc_init_exynos4.c | 180 writel(APB_SFR_INTERLEAVE_CONF_VAL, EXYNOS4_MIU_BASE + in mem_ctrl_init()
183 writel(APB_SFR_ARBRITATION_CONF_VAL, EXYNOS4_MIU_BASE + in mem_ctrl_init()
186 writel(APB_SFR_INTERLEAVE_CONF_VAL, EXYNOS4_MIU_BASE + in mem_ctrl_init()
188 writel(INTERLEAVE_ADDR_MAP_START_ADDR, EXYNOS4_MIU_BASE + in mem_ctrl_init()
190 writel(INTERLEAVE_ADDR_MAP_END_ADDR, EXYNOS4_MIU_BASE + in mem_ctrl_init()
192 writel(INTERLEAVE_ADDR_MAP_EN, EXYNOS4_MIU_BASE + in mem_ctrl_init()
195 writel(SLAVE0_SINGLE_ADDR_MAP_START_ADDR, EXYNOS4_MIU_BASE + in mem_ctrl_init()
197 writel(SLAVE0_SINGLE_ADDR_MAP_END_ADDR, EXYNOS4_MIU_BASE + in mem_ctrl_init()
199 writel(SLAVE1_SINGLE_ADDR_MAP_START_ADDR, EXYNOS4_MIU_BASE + in mem_ctrl_init()
201 writel(SLAVE1_SINGLE_ADDR_MAP_END_ADDR, EXYNOS4_MIU_BASE + in mem_ctrl_init()
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| /external/u-boot/arch/arm/mach-exynos/include/mach/ |
| D | cpu.h | 28 #define EXYNOS4_MIU_BASE 0x10600000 macro
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