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Searched refs:FADD (Results 1 – 25 of 187) sorted by relevance

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/external/apache-commons-bcel/src/main/java/org/apache/bcel/generic/
DFADD.java26 public class FADD extends ArithmeticInstruction { class
30 public FADD() { in FADD() method in FADD
31 super(org.apache.bcel.Const.FADD); in FADD()
DInstructionConst.java90 public static final ArithmeticInstruction FADD = new FADD(); field in InstructionConst
221 INSTRUCTIONS[Const.FADD] = FADD;
DInstructionConstants.java91 ArithmeticInstruction FADD = new FADD(); field
226 INSTRUCTIONS[Const.FADD] = FADD; in Clinit()
DArithmeticInstruction.java59 case Const.FADD: in getType()
DVisitor.java570 void visitFADD( FADD obj ); in visitFADD()
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AMDGPU/GlobalISel/
Dregbankselect-fadd.mir16 ; CHECK: [[FADD:%[0-9]+]]:vgpr(s32) = G_FADD [[COPY]], [[COPY2]]
32 ; CHECK: [[FADD:%[0-9]+]]:vgpr(s32) = G_FADD [[COPY]], [[COPY1]]
49 ; CHECK: [[FADD:%[0-9]+]]:vgpr(s32) = G_FADD [[COPY]], [[COPY2]]
65 ; CHECK: [[FADD:%[0-9]+]]:vgpr(s32) = G_FADD [[COPY]], [[COPY1]]
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/X86/GlobalISel/
Dlegalize-fadd-scalar.mir41 ; CHECK: [[FADD:%[0-9]+]]:_(s32) = G_FADD [[TRUNC]], [[TRUNC1]]
42 ; CHECK: [[ANYEXT:%[0-9]+]]:_(s128) = G_ANYEXT [[FADD]](s32)
80 ; CHECK: [[FADD:%[0-9]+]]:_(s64) = G_FADD [[TRUNC]], [[TRUNC1]]
81 ; CHECK: [[ANYEXT:%[0-9]+]]:_(s128) = G_ANYEXT [[FADD]](s64)
Dregbankselect-X86_64.mir487 ; FAST: [[FADD:%[0-9]+]]:vecr(s32) = G_FADD [[TRUNC]], [[TRUNC1]]
488 ; FAST: [[ANYEXT:%[0-9]+]]:vecr(s128) = G_ANYEXT [[FADD]](s32)
497 ; GREEDY: [[FADD:%[0-9]+]]:vecr(s32) = G_FADD [[TRUNC]], [[TRUNC1]]
498 ; GREEDY: [[ANYEXT:%[0-9]+]]:vecr(s128) = G_ANYEXT [[FADD]](s32)
535 ; FAST: [[FADD:%[0-9]+]]:vecr(s64) = G_FADD [[TRUNC]], [[TRUNC1]]
536 ; FAST: [[ANYEXT:%[0-9]+]]:vecr(s128) = G_ANYEXT [[FADD]](s64)
545 ; GREEDY: [[FADD:%[0-9]+]]:vecr(s64) = G_FADD [[TRUNC]], [[TRUNC1]]
546 ; GREEDY: [[ANYEXT:%[0-9]+]]:vecr(s128) = G_ANYEXT [[FADD]](s64)
743 ; FAST: [[FADD:%[0-9]+]]:vecr(<4 x s32>) = G_FADD [[COPY]], [[COPY1]]
744 ; FAST: $xmm0 = COPY [[FADD]](<4 x s32>)
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AArch64/GlobalISel/
Dlocalizer.mir204 ; CHECK: [[FADD:%[0-9]+]]:fpr(s32) = G_FADD [[C]], [[C]]
242 ; CHECK: [[FADD:%[0-9]+]]:fpr(s32) = G_FADD [[C]], [[C]]
245 ; CHECK: [[PHI:%[0-9]+]]:fpr(s32) = PHI [[FADD]](s32), %bb.0, %4(s32), %bb.1
247 ; CHECK: [[FADD1:%[0-9]+]]:fpr(s32) = G_FADD [[PHI]], [[FADD]]
284 ; CHECK: [[FADD:%[0-9]+]]:fpr(s32) = G_FADD [[COPY]], [[C1]]
Darm64-irtranslator-fmuladd.ll24 ; FPOFF: [[FADD:%[0-9]+]]:_(s32) = G_FADD [[FMUL]], [[COPY2]]
25 ; FPOFF: $s0 = COPY [[FADD]](s32)
/external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/
DSelectionDAGBuilder.cpp3649 SDValue t3 = DAG.getNode(ISD::FADD, dl, MVT::f32, t2, in visitExp()
3652 SDValue t5 = DAG.getNode(ISD::FADD, dl, MVT::f32, t4, in visitExp()
3672 SDValue t3 = DAG.getNode(ISD::FADD, dl, MVT::f32, t2, in visitExp()
3675 SDValue t5 = DAG.getNode(ISD::FADD, dl, MVT::f32, t4, in visitExp()
3678 SDValue t7 = DAG.getNode(ISD::FADD, dl, MVT::f32, t6, in visitExp()
3701 SDValue t3 = DAG.getNode(ISD::FADD, dl, MVT::f32, t2, in visitExp()
3704 SDValue t5 = DAG.getNode(ISD::FADD, dl, MVT::f32, t4, in visitExp()
3707 SDValue t7 = DAG.getNode(ISD::FADD, dl, MVT::f32, t6, in visitExp()
3710 SDValue t9 = DAG.getNode(ISD::FADD, dl, MVT::f32, t8, in visitExp()
3713 SDValue t11 = DAG.getNode(ISD::FADD, dl, MVT::f32, t10, in visitExp()
[all …]
DLegalizeVectorOps.cpp146 case ISD::FADD: in LegalizeOp()
335 return DAG.getNode(ISD::FADD, DL, Op.getValueType(), fHI, fLO); in ExpandUINT_TO_FLOAT()
/external/mesa3d/src/gallium/drivers/swr/rasterizer/jitter/
Dblend_jit.cpp229 src[swizComp] = FADD(FMUL(src[swizComp], VIMMED1(factor)), VIMMED1(0.5f)); in Quantize()
254 out[0] = FADD(srcBlend[0], dstBlend[0]); in BlendFunc()
255 out[1] = FADD(srcBlend[1], dstBlend[1]); in BlendFunc()
256 out[2] = FADD(srcBlend[2], dstBlend[2]); in BlendFunc()
257 out[3] = FADD(srcBlend[3], dstBlend[3]); in BlendFunc()
589 currentSampleMask = FP_TO_SI(FADD(currentSampleMask, VIMMED1(0.5f)), mSimdInt32Ty); in Create()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/
DX86TargetTransformInfo.cpp207 { ISD::FADD, MVT::v2f64, 2 }, // addpd in getArithmeticInstrCost()
490 { ISD::FADD, MVT::v8f64, 1 }, // Skylake from http://www.agner.org/ in getArithmeticInstrCost()
494 { ISD::FADD, MVT::v16f32, 1 }, // Skylake from http://www.agner.org/ in getArithmeticInstrCost()
633 { ISD::FADD, MVT::v4f64, 1 }, // Haswell from http://www.agner.org/ in getArithmeticInstrCost()
634 { ISD::FADD, MVT::v8f32, 1 }, // Haswell from http://www.agner.org/ in getArithmeticInstrCost()
690 { ISD::FADD, MVT::f64, 1 }, // Nehalem from http://www.agner.org/ in getArithmeticInstrCost()
691 { ISD::FADD, MVT::f32, 1 }, // Nehalem from http://www.agner.org/ in getArithmeticInstrCost()
692 { ISD::FADD, MVT::v2f64, 1 }, // Nehalem from http://www.agner.org/ in getArithmeticInstrCost()
693 { ISD::FADD, MVT::v4f32, 1 }, // Nehalem from http://www.agner.org/ in getArithmeticInstrCost()
2041 { ISD::FADD, MVT::v2f64, 2 }, in getArithmeticReductionCost()
[all …]
/external/llvm/lib/Target/X86/
DX86TargetTransformInfo.cpp1207 { ISD::FADD, MVT::v2f64, 2 }, in getReductionCost()
1208 { ISD::FADD, MVT::v4f32, 4 }, in getReductionCost()
1215 { ISD::FADD, MVT::v4f32, 4 }, in getReductionCost()
1216 { ISD::FADD, MVT::v4f64, 5 }, in getReductionCost()
1217 { ISD::FADD, MVT::v8f32, 7 }, in getReductionCost()
1226 { ISD::FADD, MVT::v2f64, 2 }, in getReductionCost()
1227 { ISD::FADD, MVT::v4f32, 4 }, in getReductionCost()
1234 { ISD::FADD, MVT::v4f32, 3 }, in getReductionCost()
1235 { ISD::FADD, MVT::v4f64, 3 }, in getReductionCost()
1236 { ISD::FADD, MVT::v8f32, 4 }, in getReductionCost()
DX86IntrinsicsInfo.h380 X86_INTRINSIC_DATA(avx512_mask_add_pd_128, INTR_TYPE_2OP_MASK, ISD::FADD, 0),
381 X86_INTRINSIC_DATA(avx512_mask_add_pd_256, INTR_TYPE_2OP_MASK, ISD::FADD, 0),
382 X86_INTRINSIC_DATA(avx512_mask_add_pd_512, INTR_TYPE_2OP_MASK, ISD::FADD,
384 X86_INTRINSIC_DATA(avx512_mask_add_ps_128, INTR_TYPE_2OP_MASK, ISD::FADD, 0),
385 X86_INTRINSIC_DATA(avx512_mask_add_ps_256, INTR_TYPE_2OP_MASK, ISD::FADD, 0),
386 X86_INTRINSIC_DATA(avx512_mask_add_ps_512, INTR_TYPE_2OP_MASK, ISD::FADD,
388 X86_INTRINSIC_DATA(avx512_mask_add_sd_round, INTR_TYPE_SCALAR_MASK_RM, ISD::FADD,
390 X86_INTRINSIC_DATA(avx512_mask_add_ss_round, INTR_TYPE_SCALAR_MASK_RM, ISD::FADD,
/external/swiftshader/third_party/LLVM/lib/Target/MBlaze/Disassembler/
DMBlazeDisassembler.cpp47 UNSUPPORTED, UNSUPPORTED, MBlaze::FADD, UNSUPPORTED, //14,15,16,17
222 case 0x000: return MBlaze::FADD; in decodeFADD()
469 case MBlaze::FADD: return decodeFADD(insn); in getOPCODE()
/external/swiftshader/third_party/LLVM/include/llvm/CodeGen/
DISDOpcodes.h235 FADD, FSUB, FMUL, FMA, FDIV, FREM, enumerator
/external/llvm/include/llvm/CodeGen/
DISDOpcodes.h241 FADD, FSUB, FMUL, FDIV, FREM, enumerator
/external/mesa3d/src/gallium/drivers/vc4/
Dvc4_qpu.h194 A_ALU2(FADD)
/external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/CodeGen/
DISDOpcodes.h260 FADD, FSUB, FMUL, FDIV, FREM, enumerator
/external/llvm/lib/CodeGen/SelectionDAG/
DSelectionDAGBuilder.cpp4183 SDValue t3 = DAG.getNode(ISD::FADD, dl, MVT::f32, t2, in getLimitedPrecisionExp2()
4186 TwoToFractionalPartOfX = DAG.getNode(ISD::FADD, dl, MVT::f32, t4, in getLimitedPrecisionExp2()
4199 SDValue t3 = DAG.getNode(ISD::FADD, dl, MVT::f32, t2, in getLimitedPrecisionExp2()
4202 SDValue t5 = DAG.getNode(ISD::FADD, dl, MVT::f32, t4, in getLimitedPrecisionExp2()
4205 TwoToFractionalPartOfX = DAG.getNode(ISD::FADD, dl, MVT::f32, t6, in getLimitedPrecisionExp2()
4220 SDValue t3 = DAG.getNode(ISD::FADD, dl, MVT::f32, t2, in getLimitedPrecisionExp2()
4223 SDValue t5 = DAG.getNode(ISD::FADD, dl, MVT::f32, t4, in getLimitedPrecisionExp2()
4226 SDValue t7 = DAG.getNode(ISD::FADD, dl, MVT::f32, t6, in getLimitedPrecisionExp2()
4229 SDValue t9 = DAG.getNode(ISD::FADD, dl, MVT::f32, t8, in getLimitedPrecisionExp2()
4232 SDValue t11 = DAG.getNode(ISD::FADD, dl, MVT::f32, t10, in getLimitedPrecisionExp2()
[all …]
/external/mesa3d/src/gallium/drivers/swr/
Dswr_shader.cpp930 Value *dist = FADD(FMUL(unwrap(cx), bpx), in CompileVS()
931 FADD(FMUL(unwrap(cy), bpy), in CompileVS()
932 FADD(FMUL(unwrap(cz), bpz), in CompileVS()
1245 interp = FADD(interp, interp1); in CompileFS()
1246 interp = FADD(interp, vc); in CompileFS()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/SelectionDAG/
DSelectionDAGBuilder.cpp4420 SDValue t3 = DAG.getNode(ISD::FADD, dl, MVT::f32, t2, in getLimitedPrecisionExp2()
4423 TwoToFractionalPartOfX = DAG.getNode(ISD::FADD, dl, MVT::f32, t4, in getLimitedPrecisionExp2()
4436 SDValue t3 = DAG.getNode(ISD::FADD, dl, MVT::f32, t2, in getLimitedPrecisionExp2()
4439 SDValue t5 = DAG.getNode(ISD::FADD, dl, MVT::f32, t4, in getLimitedPrecisionExp2()
4442 TwoToFractionalPartOfX = DAG.getNode(ISD::FADD, dl, MVT::f32, t6, in getLimitedPrecisionExp2()
4457 SDValue t3 = DAG.getNode(ISD::FADD, dl, MVT::f32, t2, in getLimitedPrecisionExp2()
4460 SDValue t5 = DAG.getNode(ISD::FADD, dl, MVT::f32, t4, in getLimitedPrecisionExp2()
4463 SDValue t7 = DAG.getNode(ISD::FADD, dl, MVT::f32, t6, in getLimitedPrecisionExp2()
4466 SDValue t9 = DAG.getNode(ISD::FADD, dl, MVT::f32, t8, in getLimitedPrecisionExp2()
4469 SDValue t11 = DAG.getNode(ISD::FADD, dl, MVT::f32, t10, in getLimitedPrecisionExp2()
[all …]
/external/llvm/lib/Target/AMDGPU/
DAMDGPUTargetTransformInfo.cpp164 case ISD::FADD: in getArithmeticInstrCost()

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