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/external/tensorflow/tensorflow/lite/experimental/micro/tools/make/targets/ecm3531/
Decm3531_flash.lds19 * .text and .ro map to FLASH all else to SRAM.
29 * FLASH is at 0x01000000 of length 0x00080000 512KB
34 FLASH (RX) : ORIGIN = 0x01000000, LENGTH = 0x00080000
50 } > FLASH= 0 symbol
55 } > FLASH
72 } > SRAM AT > FLASH
/external/u-boot/include/configs/
Dmicroblaze-generic.h18 #define FLASH macro
23 #undef FLASH
27 #undef FLASH
80 #ifdef FLASH
/external/tensorflow/tensorflow/lite/experimental/micro/tools/make/targets/apollo3evb/
Dapollo3evb.ld10 FLASH (rx) : ORIGIN = 0x0000C000, LENGTH = 960K
37 } > FLASH
56 } > SRAM AT>FLASH
/external/u-boot/doc/
DREADME.mpc85xxcds44 0xff00_0000 0xff7f_ffff FLASH (2nd bank) 8M
45 0xff80_0000 0xffff_ffff FLASH (boot bank) 8M
105 SW2=00XXXXXX FLASH: Boot bank 1, bank 2 available.
106 01XXXXXX FLASH: Boot bank 2, bank 1 available (swapped).
107 10XXXXXX FLASH: Boot promjet, bank 1 available
108 11XXXXXX FLASH: Boot promjet, bank 2 available
DREADME.ubispl88 * in the FLASH which are reserved for the SPL. Think about
106 * FLASH chip to do subpage writes.
134 UBI, so the only non UBI managed FLASH area is the one which is
DREADME.nand-boot-ppc4408 The PPC440EP(x)/GR(x) cpu's can boot directly from NAND FLASH,
9 completely without NOR FLASH. This can be done by using the NAND
DREADME.kwbimage8 The Kirkwood SoC's can boot directly from NAND FLASH,
9 SPI FLASH, SATA etc. using its internal bootRom support.
DREADME.cfi38 * FLASH at address CONFIG_SYS_FLASH_BASE is a Spansion chip and
DREADME.mpc83xxads42 0xfe00_0000 0xffff_ffff FLASH (boot bank) 16M
DREADME.pblimage5 The CoreNet SoC's can boot directly from eSPI FLASH, SD/MMC and
/external/u-boot/board/cobra5272/
DREADME38 FLASH version (for further info see subsection below)
51 # u-boot FLASH version & RAM version
57 startup automatically => "FLASH version"
/external/u-boot/board/freescale/m5253evbe/
DREADME49 FLASH: 2 MB
55 Bank # 1: CFI conformant FLASH (16 x 16) Size: 2 MB in 35 Sectors
/external/u-boot/board/freescale/mpc8315erdb/
DREADME38 0xe060_0000 0xe060_7fff NAND FLASH (CS1) 32K
39 0xfe00_0000 0xfe7f_ffff NOR FLASH (CS0) 8M
/external/u-boot/board/freescale/mpc8313erdb/
DREADME38 0xe280_0000 0xe280_7fff NAND FLASH (CS1) 32K
42 0xfe00_0000 0xfe7f_ffff NOR FLASH (CS0) 8M
/external/u-boot/board/freescale/m52277evb/
DREADME148 FLASH: 16 MB
200 erase - erase FLASH memory
201 flinfo - print FLASH memory information
221 protect - enable or disable FLASH write protection
/external/u-boot/board/freescale/mpc837xemds/
DREADME29 SW6[1-8]= 0000_1000 (HRCW is read from NOR FLASH)
35 J11 removed, Hardware Reset Configuration Word load from FLASH(NOR or NAND)
/external/u-boot/board/freescale/m547xevb/
DREADME171 FLASH: 18 MB
230 erase - erase FLASH memory
231 flinfo - print FLASH memory information
253 protect - enable or disable FLASH write protection
/external/u-boot/board/freescale/mpc832xemds/
DREADME56 JP4 removed (HRCW from FLASH)
77 0xfe00_0000 0xfeff_ffff FLASH on CS0 16M
/external/u-boot/drivers/fastboot/
DKconfig64 bool "Enable FASTBOOT FLASH command"
88 int "Define FASTBOOT MMC FLASH default device"
/external/u-boot/doc/SPI/
Dstatus.txt7 SPI FLASH (drivers/mtd/spi):
/external/u-boot/board/freescale/m5373evb/
DREADME152 FLASH: 2 MB
211 erase - erase FLASH memory
212 flinfo - print FLASH memory information
236 protect - enable or disable FLASH write protection
/external/u-boot/board/freescale/mpc8323erdb/
DREADME12 0xfe00_0000 0xfeff_ffff NOR FLASH (CS0) 16M
/external/u-boot/drivers/net/
Dsmc91111.c393 swap_to(FLASH); in smc_halt()
619 swap_to(FLASH); in smc_write_hwaddr()
1295 swap_to(FLASH); in smc91111_initialize()
/external/u-boot/board/freescale/m54455evb/
DREADME221 FLASH: 16.5 MB
293 erase - erase FLASH memory
299 flinfo - print FLASH memory information
325 protect - enable or disable FLASH write protection
/external/u-boot/board/keymile/km83xx/
DREADME.kmeter119 0xf000_0000 16 bit 256MB FLASH on CS0

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