Searched refs:FPMulAdd (Results 1 – 6 of 6) sorted by relevance
| /external/vixl/src/aarch64/ |
| D | simulator-aarch64.cc | 3504 FPMulAdd(ReadHRegister(fa), in VisitFPDataProcessing3Source()
3510 FPMulAdd(ReadHRegister(fa), in VisitFPDataProcessing3Source()
3516 FPMulAdd(ReadSRegister(fa), in VisitFPDataProcessing3Source()
3522 FPMulAdd(ReadSRegister(fa), in VisitFPDataProcessing3Source()
3528 FPMulAdd(ReadDRegister(fa), in VisitFPDataProcessing3Source()
3534 FPMulAdd(ReadDRegister(fa), in VisitFPDataProcessing3Source()
3541 FPMulAdd(-ReadHRegister(fa), in VisitFPDataProcessing3Source()
3547 FPMulAdd(-ReadHRegister(fa), in VisitFPDataProcessing3Source()
3553 FPMulAdd(-ReadSRegister(fa), in VisitFPDataProcessing3Source()
3559 FPMulAdd(-ReadSRegister(fa), in VisitFPDataProcessing3Source()
[all …]
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| D | logic-aarch64.cc | 2334 dst.SetFloat<T>(e * 2, FPMulAdd(dst.Float<T>(e * 2), element2, element1)); in fcmla()
2336 FPMulAdd(dst.Float<T>(e * 2 + 1), element4, element3)); in fcmla()
2388 dst.SetFloat<T>(e * 2, FPMulAdd(dst.Float<T>(e * 2), element2, element1)); in fcmla()
2390 FPMulAdd(dst.Float<T>(e * 2 + 1), element4, element3)); in fcmla()
3748 T Simulator::FPMulAdd(T a, T op1, T op2) { in FPMulAdd() function in vixl::aarch64::Simulator
4373 T result = FPMulAdd(acc, op1, op2); in fmla()
4406 T result = FPMulAdd(acc, op1, op2); in fmls()
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| D | simulator-aarch64.h | 3063 T FPMulAdd(T a, T op1, T op2);
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| /external/v8/src/arm64/ |
| D | simulator-arm64.cc | 2885 set_sreg(fd, FPMulAdd(sreg(fa), sreg(fn), sreg(fm))); in VisitFPDataProcessing3Source()
2888 set_sreg(fd, FPMulAdd(sreg(fa), -sreg(fn), sreg(fm))); in VisitFPDataProcessing3Source()
2891 set_dreg(fd, FPMulAdd(dreg(fa), dreg(fn), dreg(fm))); in VisitFPDataProcessing3Source()
2894 set_dreg(fd, FPMulAdd(dreg(fa), -dreg(fn), dreg(fm))); in VisitFPDataProcessing3Source()
2898 set_sreg(fd, FPMulAdd(-sreg(fa), -sreg(fn), sreg(fm))); in VisitFPDataProcessing3Source()
2901 set_sreg(fd, FPMulAdd(-sreg(fa), sreg(fn), sreg(fm))); in VisitFPDataProcessing3Source()
2904 set_dreg(fd, FPMulAdd(-dreg(fa), -dreg(fn), dreg(fm))); in VisitFPDataProcessing3Source()
2907 set_dreg(fd, FPMulAdd(-dreg(fa), dreg(fn), dreg(fm))); in VisitFPDataProcessing3Source()
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| D | simulator-logic-arm64.cc | 2977 T Simulator::FPMulAdd(T a, T op1, T op2) { in FPMulAdd() function in v8::internal::Simulator
3446 T result = FPMulAdd(acc, op1, op2); in fmla()
3473 T result = FPMulAdd(acc, op1, op2); in fmls()
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| D | simulator-arm64.h | 2064 T FPMulAdd(T a, T op1, T op2);
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