Searched refs:FPRoundOdd (Results 1 – 6 of 6) sorted by relevance
| /external/vixl/src/ |
| D | utils-vixl.h | 1014 FPRoundOdd enumerator
1042 VIXL_ASSERT((round_mode == FPTieEven) || (round_mode == FPRoundOdd)); in FPRound()
1121 VIXL_ASSERT(round_mode == FPRoundOdd); in FPRound()
1154 VIXL_ASSERT(round_mode == FPRoundOdd); in FPRound()
1198 VIXL_ASSERT(round_mode == FPRoundOdd); in FPRound()
|
| D | utils-vixl.cc | 340 VIXL_ASSERT((round_mode == FPTieEven) || (round_mode == FPRoundOdd)); in FPToFloat()
|
| /external/v8/src/arm64/ |
| D | instructions-arm64.h | 69 FPRoundOdd enumerator
|
| D | simulator-arm64.h | 55 DCHECK((round_mode == FPTieEven) || (round_mode == FPRoundOdd)); in FPRound()
134 DCHECK_EQ(round_mode, FPRoundOdd); in FPRound()
167 DCHECK_EQ(round_mode, FPRoundOdd); in FPRound()
207 DCHECK_EQ(round_mode, FPRoundOdd); in FPRound()
|
| D | simulator-logic-arm64.cc | 295 DCHECK((round_mode == FPTieEven) || (round_mode == FPRoundOdd)); in FPToFloat()
3823 dst.SetFloat(i, FPToFloat(src.Float<double>(i), FPRoundOdd)); in fcvtxn()
3833 dst.SetFloat(i + lane_count, FPToFloat(src.Float<double>(i), FPRoundOdd)); in fcvtxn2()
|
| /external/vixl/src/aarch64/ |
| D | logic-aarch64.cc | 4902 dst.SetFloat(i, FPToFloat(src.Float<double>(i), FPRoundOdd, ReadDN())); in fcvtxn()
4915 FPToFloat(src.Float<double>(i), FPRoundOdd, ReadDN())); in fcvtxn2()
|