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Searched refs:FP_REG (Results 1 – 6 of 6) sorted by relevance

/external/elfutils/backends/
Daarch64_unwind.c34 #define FP_REG 29 macro
59 if (!getfunc(FP_REG, 1, &fp, arg)) in EBLHOOK()
77 setfunc(FP_REG, 1, &newFp, arg); in EBLHOOK()
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AMDGPU/
Dcall-argument-types.ll660 ; MESA-DAG: s_add_u32 [[SP:s[0-9]+]], [[FP_REG:s[0-9]+]], 0x800{{$}}
661 ; HSA-DAG: s_add_u32 [[SP:s[0-9]+]], [[FP_REG:s[0-9]+]], 0x800{{$}}
665 ; GCN-DAG: buffer_store_byte [[VAL0]], off, s{{\[[0-9]+:[0-9]+\]}}, [[FP_REG]] offset:8
666 ; GCN-DAG: buffer_store_dword [[VAL1]], off, s{{\[[0-9]+:[0-9]+\]}}, [[FP_REG]] offset:12
668 ; GCN-DAG: buffer_load_dword [[RELOAD_VAL0:v[0-9]+]], off, s{{\[[0-9]+:[0-9]+\]}}, [[FP_REG]] offse…
669 ; GCN-DAG: buffer_load_dword [[RELOAD_VAL1:v[0-9]+]], off, s{{\[[0-9]+:[0-9]+\]}}, [[FP_REG]] offse…
675 ; GCN-DAG: buffer_load_ubyte [[LOAD_OUT_VAL0:v[0-9]+]], off, s{{\[[0-9]+:[0-9]+\]}}, [[FP_REG]] off…
676 ; GCN-DAG: buffer_load_dword [[LOAD_OUT_VAL1:v[0-9]+]], off, s{{\[[0-9]+:[0-9]+\]}}, [[FP_REG]] off…
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/
DSIMachineFunctionInfo.h95 unsigned FrameOffsetReg = AMDGPU::FP_REG;
DSIRegisterInfo.td49 def FP_REG : SIReg<"", 0>;
402 (add FP_REG, SP_REG, SCRATCH_WAVE_OFFSET_REG)> {
DSIISelLowering.cpp8432 MRI.replaceRegWith(AMDGPU::FP_REG, Info->getFrameOffsetReg()); in finalizeLowering()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/InstPrinter/
DAMDGPUInstPrinter.cpp314 case AMDGPU::FP_REG: in printRegOperand()