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Searched refs:FRAC_PLL_INT_DIV_CTL_MASK (Results 1 – 2 of 2) sorted by relevance

/external/u-boot/arch/arm/include/asm/arch-mx8m/
Dclock.h528 #define FRAC_PLL_INT_DIV_CTL_MASK 0x7f macro
/external/u-boot/arch/arm/mach-imx/mx8m/
Dclock.c68 divfi = pll_cfg1 & FRAC_PLL_INT_DIV_CTL_MASK; in decode_frac_pll()