Home
last modified time | relevance | path

Searched refs:FRAC_PLL_REFCLK_DIV_VAL_MASK (Results 1 – 2 of 2) sorted by relevance

/external/u-boot/arch/arm/include/asm/arch-mx8m/
Dclock.h516 #define FRAC_PLL_REFCLK_DIV_VAL_MASK (0x3f << 5) macro
/external/u-boot/arch/arm/mach-imx/mx8m/
Dclock.c62 divr_val = (pll_cfg0 & FRAC_PLL_REFCLK_DIV_VAL_MASK) >> in decode_frac_pll()