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Searched refs:FSL_CORENET_RCWSR5_DDR_SYNC_SHIFT (Results 1 – 2 of 2) sorted by relevance

/external/u-boot/arch/powerpc/cpu/mpc85xx/
Dcpu.c62 >> FSL_CORENET_RCWSR5_DDR_SYNC_SHIFT; in checkcpu()
/external/u-boot/arch/powerpc/include/asm/
Dimmap_85xx.h1835 #define FSL_CORENET_RCWSR5_DDR_SYNC_SHIFT 7 macro