Home
last modified time | relevance | path

Searched refs:FSL_DDR_CS0_CS1_AND_CS2_CS3 (Results 1 – 5 of 5) sorted by relevance

/external/u-boot/include/
Dfsl_ddr_sdram.h85 #define FSL_DDR_CS0_CS1_AND_CS2_CS3 (FSL_DDR_CS0_CS1 | FSL_DDR_CS2_CS3) macro
86 #define FSL_DDR_CS0_CS1_CS2_CS3 (FSL_DDR_CS0_CS1_AND_CS2_CS3 | 0x04)
/external/u-boot/drivers/ddr/fsl/
Dutil.c315 case FSL_DDR_CS0_CS1_AND_CS2_CS3: in print_ddr_info()
Doptions.c1203 popts->ba_intlv_ctl = FSL_DDR_CS0_CS1_AND_CS2_CS3; in populate_memctl_options()
1263 case FSL_DDR_CS0_CS1_AND_CS2_CS3: in populate_memctl_options()
Dmain.c317 case FSL_DDR_CS0_CS1_AND_CS2_CS3: in __step_assign_addresses()
Dctrl_regs.c2445 case FSL_DDR_CS0_CS1_AND_CS2_CS3: in compute_fsl_memctl_config_regs()
2472 case FSL_DDR_CS0_CS1_AND_CS2_CS3: in compute_fsl_memctl_config_regs()