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Searched refs:FinalReg (Results 1 – 4 of 4) sorted by relevance

/external/llvm/lib/Target/X86/AsmParser/
DX86AsmParser.cpp1079 unsigned FinalReg = FinalOp.Mem.BaseReg; in VerifyAndAdjustOperands() local
1100 bool IsSI = IsSIReg(FinalReg); in VerifyAndAdjustOperands()
1101 FinalReg = GetSIDIForRegClass(RegClassID, FinalReg, IsSI); in VerifyAndAdjustOperands()
1103 if (FinalReg != OrigReg) { in VerifyAndAdjustOperands()
1113 FinalOp.Mem.BaseReg = FinalReg; in VerifyAndAdjustOperands()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/AsmParser/
DX86AsmParser.cpp1280 unsigned FinalReg = FinalOp.Mem.BaseReg; in VerifyAndAdjustOperands() local
1301 bool IsSI = IsSIReg(FinalReg); in VerifyAndAdjustOperands()
1302 FinalReg = GetSIDIForRegClass(RegClassID, FinalReg, IsSI); in VerifyAndAdjustOperands()
1304 if (FinalReg != OrigReg) { in VerifyAndAdjustOperands()
1314 FinalOp.Mem.BaseReg = FinalReg; in VerifyAndAdjustOperands()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/
DX86FrameLowering.cpp595 FinalReg = InProlog ? (unsigned)X86::RDX in emitStackProbeInline() local
656 BuildMI(&MBB, DL, TII.get(X86::CMOVB64rr), FinalReg) in emitStackProbeInline()
673 BuildMI(&MBB, DL, TII.get(X86::CMP64rr)).addReg(FinalReg).addReg(LimitReg); in emitStackProbeInline()
678 RoundMBB->addLiveIn(FinalReg); in emitStackProbeInline()
680 .addReg(FinalReg) in emitStackProbeInline()
/external/llvm/lib/Target/X86/
DX86FrameLowering.cpp558 FinalReg = InProlog ? (unsigned)X86::RDX in emitStackProbeInline() local
605 BuildMI(&MBB, DL, TII.get(X86::CMOVB64rr), FinalReg) in emitStackProbeInline()
622 BuildMI(&MBB, DL, TII.get(X86::CMP64rr)).addReg(FinalReg).addReg(LimitReg); in emitStackProbeInline()
628 .addReg(FinalReg) in emitStackProbeInline()