| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AVR/MCTargetDesc/ |
| D | AVRAsmBackend.cpp | 39 const MCFixup &Fixup, MCContext *Ctx = nullptr) { in signed_width() argument
50 Ctx->reportFatalError(Fixup.getLoc(), Diagnostic); in signed_width()
58 const MCFixup &Fixup, MCContext *Ctx = nullptr) { in unsigned_width() argument
68 Ctx->reportFatalError(Fixup.getLoc(), Diagnostic); in unsigned_width()
76 void adjustBranch(unsigned Size, const MCFixup &Fixup, uint64_t &Value, in adjustBranch() argument
80 unsigned_width(Size + 1, Value, std::string("branch target"), Fixup, Ctx); in adjustBranch()
87 void adjustRelativeBranch(unsigned Size, const MCFixup &Fixup, uint64_t &Value, in adjustRelativeBranch() argument
91 signed_width(Size + 1, Value, std::string("branch target"), Fixup, Ctx); in adjustRelativeBranch()
105 void fixup_call(unsigned Size, const MCFixup &Fixup, uint64_t &Value, in fixup_call() argument
107 adjustBranch(Size, Fixup, Value, Ctx); in fixup_call()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/MCTargetDesc/ |
| D | AArch64ELFObjectWriter.cpp | 40 const MCFixup &Fixup, bool IsPCRel) const override;
58 static bool isNonILP32reloc(const MCFixup &Fixup, in isNonILP32reloc() argument
61 if ((unsigned)Fixup.getKind() != AArch64::fixup_aarch64_movw) in isNonILP32reloc()
65 Ctx.reportError(Fixup.getLoc(), BAD_ILP32_MOV(MOVW_UABS_G3)); in isNonILP32reloc()
68 Ctx.reportError(Fixup.getLoc(), BAD_ILP32_MOV(MOVW_UABS_G2)); in isNonILP32reloc()
71 Ctx.reportError(Fixup.getLoc(), BAD_ILP32_MOV(MOVW_SABS_G2)); in isNonILP32reloc()
74 Ctx.reportError(Fixup.getLoc(), BAD_ILP32_MOV(MOVW_UABS_G2_NC)); in isNonILP32reloc()
77 Ctx.reportError(Fixup.getLoc(), BAD_ILP32_MOV(MOVW_SABS_G1)); in isNonILP32reloc()
80 Ctx.reportError(Fixup.getLoc(), BAD_ILP32_MOV(MOVW_UABS_G1_NC)); in isNonILP32reloc()
83 Ctx.reportError(Fixup.getLoc(), BAD_ILP32_MOV(TLSLD_MOVW_DTPREL_G2)); in isNonILP32reloc()
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| D | AArch64MachObjectWriter.cpp | 36 bool getAArch64FixupKindMachOInfo(const MCFixup &Fixup, unsigned &RelocType,
46 const MCFixup &Fixup, MCValue Target,
53 const MCFixup &Fixup, unsigned &RelocType, const MCSymbolRefExpr *Sym, in getAArch64FixupKindMachOInfo() argument
58 switch ((unsigned)Fixup.getKind()) { in getAArch64FixupKindMachOInfo()
103 Asm.getContext().reportError(Fixup.getLoc(), in getAArch64FixupKindMachOInfo()
154 const MCFragment *Fragment, const MCFixup &Fixup, MCValue Target, in recordRelocation() argument
156 unsigned IsPCRel = Writer->isFixupKindPCRel(Asm, Fixup.getKind()); in recordRelocation()
164 unsigned Kind = Fixup.getKind(); in recordRelocation()
167 FixupOffset += Fixup.getOffset(); in recordRelocation()
183 Asm.getContext().reportError(Fixup.getLoc(), in recordRelocation()
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| D | AArch64AsmBackend.cpp | 74 void applyFixup(const MCAssembler &Asm, const MCFixup &Fixup,
81 bool fixupNeedsRelaxation(const MCFixup &Fixup, uint64_t Value,
94 bool shouldForceRelocation(const MCAssembler &Asm, const MCFixup &Fixup,
147 static uint64_t adjustFixupValue(const MCFixup &Fixup, uint64_t Value, in adjustFixupValue() argument
150 unsigned Kind = Fixup.getKind(); in adjustFixupValue()
157 Ctx.reportError(Fixup.getLoc(), "fixup value out of range"); in adjustFixupValue()
168 Ctx.reportError(Fixup.getLoc(), "fixup value out of range"); in adjustFixupValue()
170 Ctx.reportError(Fixup.getLoc(), "fixup not sufficiently aligned"); in adjustFixupValue()
179 Ctx.reportError(Fixup.getLoc(), "fixup value out of range"); in adjustFixupValue()
186 Ctx.reportError(Fixup.getLoc(), "fixup value out of range"); in adjustFixupValue()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/BPF/MCTargetDesc/ |
| D | BPFAsmBackend.cpp | 30 void applyFixup(const MCAssembler &Asm, const MCFixup &Fixup,
39 bool fixupNeedsRelaxation(const MCFixup &Fixup, uint64_t Value, in fixupNeedsRelaxation() argument
70 void BPFAsmBackend::applyFixup(const MCAssembler &Asm, const MCFixup &Fixup, in applyFixup() argument
75 if (Fixup.getKind() == FK_SecRel_4 || Fixup.getKind() == FK_SecRel_8) { in applyFixup()
78 Ctx.reportError(Fixup.getLoc(), in applyFixup()
82 } else if (Fixup.getKind() == FK_Data_4) { in applyFixup()
83 support::endian::write<uint32_t>(&Data[Fixup.getOffset()], Value, Endian); in applyFixup()
84 } else if (Fixup.getKind() == FK_Data_8) { in applyFixup()
85 support::endian::write<uint64_t>(&Data[Fixup.getOffset()], Value, Endian); in applyFixup()
86 } else if (Fixup.getKind() == FK_PCRel_4) { in applyFixup()
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| /external/llvm/lib/Target/X86/MCTargetDesc/ |
| D | X86MachObjectWriter.cpp | 32 const MCFixup &Fixup,
40 const MCFixup &Fixup,
48 const MCFixup &Fixup,
53 const MCFragment *Fragment, const MCFixup &Fixup,
62 const MCFixup &Fixup, MCValue Target, in recordRelocation() argument
65 RecordX86_64Relocation(Writer, Asm, Layout, Fragment, Fixup, Target, in recordRelocation()
68 RecordX86Relocation(Writer, Asm, Layout, Fragment, Fixup, Target, in recordRelocation()
104 const MCFragment *Fragment, const MCFixup &Fixup, MCValue Target, in RecordX86_64Relocation() argument
106 unsigned IsPCRel = Writer->isFixupKindPCRel(Asm, Fixup.getKind()); in RecordX86_64Relocation()
107 unsigned IsRIPRel = isFixupKindRIPRel(Fixup.getKind()); in RecordX86_64Relocation()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/MCTargetDesc/ |
| D | X86MachObjectWriter.cpp | 32 const MCFixup &Fixup,
40 const MCFixup &Fixup,
48 const MCFixup &Fixup,
53 const MCFragment *Fragment, const MCFixup &Fixup,
62 const MCFixup &Fixup, MCValue Target, in recordRelocation() argument
65 RecordX86_64Relocation(Writer, Asm, Layout, Fragment, Fixup, Target, in recordRelocation()
68 RecordX86Relocation(Writer, Asm, Layout, Fragment, Fixup, Target, in recordRelocation()
105 const MCFragment *Fragment, const MCFixup &Fixup, MCValue Target, in RecordX86_64Relocation() argument
107 unsigned IsPCRel = Writer->isFixupKindPCRel(Asm, Fixup.getKind()); in RecordX86_64Relocation()
108 unsigned IsRIPRel = isFixupKindRIPRel(Fixup.getKind()); in RecordX86_64Relocation()
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| /external/llvm/lib/Target/BPF/MCTargetDesc/ |
| D | BPFAsmBackend.cpp | 34 void applyFixup(const MCFixup &Fixup, char *Data, unsigned DataSize,
40 bool fixupNeedsRelaxation(const MCFixup &Fixup, uint64_t Value, in fixupNeedsRelaxation() argument
66 void BPFAsmBackend::applyFixup(const MCFixup &Fixup, char *Data, in applyFixup() argument
70 if (Fixup.getKind() == FK_SecRel_4 || Fixup.getKind() == FK_SecRel_8) { in applyFixup()
72 } else if (Fixup.getKind() == FK_Data_4 || Fixup.getKind() == FK_Data_8) { in applyFixup()
73 unsigned Size = Fixup.getKind() == FK_Data_4 ? 4 : 8; in applyFixup()
77 Data[Fixup.getOffset() + Idx] = uint8_t(Value >> (i * 8)); in applyFixup()
80 assert(Fixup.getKind() == FK_PCRel_2); in applyFixup()
83 Data[Fixup.getOffset() + 2] = Value & 0xFF; in applyFixup()
84 Data[Fixup.getOffset() + 3] = Value >> 8; in applyFixup()
[all …]
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| /external/llvm/lib/Target/AArch64/MCTargetDesc/ |
| D | AArch64MachObjectWriter.cpp | 28 bool getAArch64FixupKindMachOInfo(const MCFixup &Fixup, unsigned &RelocType,
38 const MCFixup &Fixup, MCValue Target,
44 const MCFixup &Fixup, unsigned &RelocType, const MCSymbolRefExpr *Sym, in getAArch64FixupKindMachOInfo() argument
49 switch ((unsigned)Fixup.getKind()) { in getAArch64FixupKindMachOInfo()
94 Asm.getContext().reportError(Fixup.getLoc(), in getAArch64FixupKindMachOInfo()
146 const MCFragment *Fragment, const MCFixup &Fixup, MCValue Target, in recordRelocation() argument
148 unsigned IsPCRel = Writer->isFixupKindPCRel(Asm, Fixup.getKind()); in recordRelocation()
156 unsigned Kind = Fixup.getKind(); in recordRelocation()
159 FixupOffset += Fixup.getOffset(); in recordRelocation()
175 Asm.getContext().reportError(Fixup.getLoc(), in recordRelocation()
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| D | AArch64AsmBackend.cpp | 74 void applyFixup(const MCFixup &Fixup, char *Data, unsigned DataSize,
78 bool fixupNeedsRelaxation(const MCFixup &Fixup, uint64_t Value,
139 static uint64_t adjustFixupValue(const MCFixup &Fixup, uint64_t Value, in adjustFixupValue() argument
141 unsigned Kind = Fixup.getKind(); in adjustFixupValue()
148 Ctx->reportError(Fixup.getLoc(), "fixup value out of range"); in adjustFixupValue()
156 if (Ctx) Ctx->reportError(Fixup.getLoc(), "fixup value out of range"); in adjustFixupValue()
158 Ctx->reportError(Fixup.getLoc(), "fixup not sufficiently aligned"); in adjustFixupValue()
165 Ctx->reportError(Fixup.getLoc(), "fixup value out of range"); in adjustFixupValue()
170 Ctx->reportError(Fixup.getLoc(), "fixup value out of range"); in adjustFixupValue()
172 Ctx->reportError(Fixup.getLoc(), "fixup must be 2-byte aligned"); in adjustFixupValue()
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| D | AArch64ELFObjectWriter.cpp | 34 const MCFixup &Fixup, bool IsPCRel) const override;
49 const MCFixup &Fixup, in getRelocType() argument
65 switch ((unsigned)Fixup.getKind()) { in getRelocType()
67 Ctx.reportError(Fixup.getLoc(), "1-byte data relocations not supported"); in getRelocType()
87 Ctx.reportError(Fixup.getLoc(), in getRelocType()
103 Ctx.reportError(Fixup.getLoc(), "Unsupported pc-relative fixup kind"); in getRelocType()
107 switch ((unsigned)Fixup.getKind()) { in getRelocType()
109 Ctx.reportError(Fixup.getLoc(), "1-byte data relocations not supported"); in getRelocType()
135 Ctx.reportError(Fixup.getLoc(), in getRelocType()
150 Ctx.reportError(Fixup.getLoc(), in getRelocType()
[all …]
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| /external/llvm/lib/Target/Mips/MCTargetDesc/ |
| D | MipsAsmBackend.cpp | 36 static unsigned adjustFixupValue(const MCFixup &Fixup, uint64_t Value, in adjustFixupValue() argument
39 unsigned Kind = Fixup.getKind(); in adjustFixupValue()
72 Ctx->reportError(Fixup.getLoc(), "out of range PC16 fixup"); in adjustFixupValue()
82 Ctx->reportError(Fixup.getLoc(), "out of range PC19 fixup"); in adjustFixupValue()
119 Ctx->reportError(Fixup.getLoc(), "out of range PC7 fixup"); in adjustFixupValue()
129 Ctx->reportError(Fixup.getLoc(), "out of range PC10 fixup"); in adjustFixupValue()
139 Ctx->reportError(Fixup.getLoc(), "out of range PC16 fixup"); in adjustFixupValue()
148 Ctx->reportError(Fixup.getLoc(), "out of range PC18 fixup"); in adjustFixupValue()
155 Ctx->reportError(Fixup.getLoc(), "out of range PC18 fixup"); in adjustFixupValue()
161 Ctx->reportError(Fixup.getLoc(), "out of range PC18 fixup"); in adjustFixupValue()
[all …]
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| /external/swiftshader/third_party/LLVM/lib/Target/X86/MCTargetDesc/ |
| D | X86MachObjectWriter.cpp | 30 const MCFixup &Fixup,
38 const MCFixup &Fixup,
46 const MCFixup &Fixup,
53 const MCFixup &Fixup,
64 const MCFragment *Fragment, const MCFixup &Fixup, in RecordRelocation() argument
67 RecordX86_64Relocation(Writer, Asm, Layout, Fragment, Fixup, Target, in RecordRelocation()
70 RecordX86Relocation(Writer, Asm, Layout, Fragment, Fixup, Target, in RecordRelocation()
103 const MCFixup &Fixup, in RecordX86_64Relocation() argument
106 unsigned IsPCRel = Writer->isFixupKindPCRel(Asm, Fixup.getKind()); in RecordX86_64Relocation()
107 unsigned IsRIPRel = isFixupKindRIPRel(Fixup.getKind()); in RecordX86_64Relocation()
[all …]
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/MCTargetDesc/ |
| D | ARMMachObjectWriter.cpp | 33 const MCFixup &Fixup,
42 const MCFixup &Fixup, MCValue Target,
56 const MCFixup &Fixup, MCValue Target,
143 const MCFixup &Fixup, in RecordARMScatteredHalfRelocation() argument
146 uint32_t FixupOffset = Layout.getFragmentOffset(Fragment)+Fixup.getOffset(); in RecordARMScatteredHalfRelocation()
147 unsigned IsPCRel = Writer->isFixupKindPCRel(Asm, Fixup.getKind()); in RecordARMScatteredHalfRelocation()
154 Asm.getContext().reportError(Fixup.getLoc(), in RecordARMScatteredHalfRelocation()
169 Asm.getContext().reportError(Fixup.getLoc(), in RecordARMScatteredHalfRelocation()
197 switch ((unsigned)Fixup.getKind()) { in RecordARMScatteredHalfRelocation()
247 const MCFixup &Fixup, in RecordARMScatteredRelocation() argument
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| D | ARMAsmBackend.cpp | 206 const char *ARMAsmBackend::reasonForFixupRelaxation(const MCFixup &Fixup, in reasonForFixupRelaxation() argument
208 switch ((unsigned)Fixup.getKind()) { in reasonForFixupRelaxation()
259 bool ARMAsmBackend::fixupNeedsRelaxation(const MCFixup &Fixup, uint64_t Value, in fixupNeedsRelaxation() argument
262 return reasonForFixupRelaxation(Fixup, Value); in fixupNeedsRelaxation()
363 const MCFixup &Fixup, in adjustFixupValue() argument
367 unsigned Kind = Fixup.getKind(); in adjustFixupValue()
384 Ctx.reportError(Fixup.getLoc(), "bad relocation fixup type"); in adjustFixupValue()
437 Ctx.reportError(Fixup.getLoc(), "out of range pc-relative fixup value"); in adjustFixupValue()
458 Ctx.reportError(Fixup.getLoc(), "out of range pc-relative fixup value"); in adjustFixupValue()
489 dyn_cast<MCSymbolRefExpr>(Fixup.getValue())) in adjustFixupValue()
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| /external/llvm/lib/Target/ARM/MCTargetDesc/ |
| D | ARMMachObjectWriter.cpp | 33 const MCFixup &Fixup,
42 const MCFixup &Fixup, MCValue Target,
56 const MCFixup &Fixup, MCValue Target,
143 const MCFixup &Fixup, in RecordARMScatteredHalfRelocation() argument
146 uint32_t FixupOffset = Layout.getFragmentOffset(Fragment)+Fixup.getOffset(); in RecordARMScatteredHalfRelocation()
147 unsigned IsPCRel = Writer->isFixupKindPCRel(Asm, Fixup.getKind()); in RecordARMScatteredHalfRelocation()
154 Asm.getContext().reportError(Fixup.getLoc(), in RecordARMScatteredHalfRelocation()
169 Asm.getContext().reportError(Fixup.getLoc(), in RecordARMScatteredHalfRelocation()
197 switch ((unsigned)Fixup.getKind()) { in RecordARMScatteredHalfRelocation()
247 const MCFixup &Fixup, in RecordARMScatteredRelocation() argument
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| D | ARMAsmBackend.cpp | 202 const char *ARMAsmBackend::reasonForFixupRelaxation(const MCFixup &Fixup, in reasonForFixupRelaxation() argument
204 switch ((unsigned)Fixup.getKind()) { in reasonForFixupRelaxation()
255 bool ARMAsmBackend::fixupNeedsRelaxation(const MCFixup &Fixup, uint64_t Value, in fixupNeedsRelaxation() argument
258 return reasonForFixupRelaxation(Fixup, Value); in fixupNeedsRelaxation()
359 unsigned ARMAsmBackend::adjustFixupValue(const MCFixup &Fixup, uint64_t Value, in adjustFixupValue() argument
363 unsigned Kind = Fixup.getKind(); in adjustFixupValue()
416 Ctx->reportError(Fixup.getLoc(), "out of range pc-relative fixup value"); in adjustFixupValue()
437 Ctx->reportError(Fixup.getLoc(), "out of range pc-relative fixup value"); in adjustFixupValue()
468 dyn_cast<MCSymbolRefExpr>(Fixup.getValue())) in adjustFixupValue()
545 Ctx->reportError(Fixup.getLoc(), "misaligned ARM call destination"); in adjustFixupValue()
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| /external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/MC/ |
| D | MCFixup.h | 103 static MCFixup createAddFor(const MCFixup &Fixup) { in createAddFor() argument
105 FI.Value = Fixup.getValue(); in createAddFor()
106 FI.Offset = Fixup.getOffset(); in createAddFor()
107 FI.Kind = (unsigned)getAddKindForKind(Fixup.getKind()); in createAddFor()
108 FI.Loc = Fixup.getLoc(); in createAddFor()
114 static MCFixup createSubFor(const MCFixup &Fixup) { in createSubFor() argument
116 FI.Value = Fixup.getValue(); in createSubFor()
117 FI.Offset = Fixup.getOffset(); in createSubFor()
118 FI.Kind = (unsigned)getSubKindForKind(Fixup.getKind()); in createSubFor()
119 FI.Loc = Fixup.getLoc(); in createSubFor()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/MCTargetDesc/ |
| D | MipsAsmBackend.cpp | 39 static unsigned adjustFixupValue(const MCFixup &Fixup, uint64_t Value, in adjustFixupValue() argument
42 unsigned Kind = Fixup.getKind(); in adjustFixupValue()
83 Ctx.reportError(Fixup.getLoc(), "out of range PC16 fixup"); in adjustFixupValue()
93 Ctx.reportError(Fixup.getLoc(), "out of range PC19 fixup"); in adjustFixupValue()
132 Ctx.reportError(Fixup.getLoc(), "out of range PC7 fixup"); in adjustFixupValue()
142 Ctx.reportError(Fixup.getLoc(), "out of range PC10 fixup"); in adjustFixupValue()
152 Ctx.reportError(Fixup.getLoc(), "out of range PC16 fixup"); in adjustFixupValue()
161 Ctx.reportError(Fixup.getLoc(), "out of range PC18 fixup"); in adjustFixupValue()
168 Ctx.reportError(Fixup.getLoc(), "out of range PC18 fixup"); in adjustFixupValue()
174 Ctx.reportError(Fixup.getLoc(), "out of range PC18 fixup"); in adjustFixupValue()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/RISCV/MCTargetDesc/ |
| D | RISCVAsmBackend.cpp | 45 void applyFixup(const MCAssembler &Asm, const MCFixup &Fixup,
56 bool shouldForceRelocation(const MCAssembler &Asm, const MCFixup &Fixup, in shouldForceRelocation() argument
61 bool fixupNeedsRelaxation(const MCFixup &Fixup, uint64_t Value, in fixupNeedsRelaxation() argument
67 bool fixupNeedsRelaxationAdvanced(const MCFixup &Fixup, bool Resolved,
119 bool RISCVAsmBackend::fixupNeedsRelaxationAdvanced(const MCFixup &Fixup, in fixupNeedsRelaxationAdvanced() argument
133 switch ((unsigned)Fixup.getKind()) { in fixupNeedsRelaxationAdvanced()
226 static uint64_t adjustFixupValue(const MCFixup &Fixup, uint64_t Value, in adjustFixupValue() argument
228 unsigned Kind = Fixup.getKind(); in adjustFixupValue()
249 Ctx.reportError(Fixup.getLoc(), "fixup value out of range"); in adjustFixupValue()
251 Ctx.reportError(Fixup.getLoc(), "fixup value must be 2-byte aligned"); in adjustFixupValue()
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| /external/swiftshader/third_party/LLVM/lib/Target/ARM/MCTargetDesc/ |
| D | ARMMachObjectWriter.cpp | 31 const MCFixup &Fixup,
39 const MCFixup &Fixup, MCValue Target,
50 const MCFragment *Fragment, const MCFixup &Fixup,
126 const MCFixup &Fixup, in RecordARMMovwMovtRelocation() argument
129 uint32_t FixupOffset = Layout.getFragmentOffset(Fragment)+Fixup.getOffset(); in RecordARMMovwMovtRelocation()
130 unsigned IsPCRel = Writer->isFixupKindPCRel(Asm, Fixup.getKind()); in RecordARMMovwMovtRelocation()
176 switch ((unsigned)Fixup.getKind()) { in RecordARMMovwMovtRelocation()
223 const MCFixup &Fixup, in RecordARMScatteredRelocation() argument
227 uint32_t FixupOffset = Layout.getFragmentOffset(Fragment)+Fixup.getOffset(); in RecordARMScatteredRelocation()
228 unsigned IsPCRel = Writer->isFixupKindPCRel(Asm, Fixup.getKind()); in RecordARMScatteredRelocation()
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| /external/llvm/lib/Target/PowerPC/MCTargetDesc/ |
| D | PPCMachObjectWriter.cpp | 31 const MCFixup &Fixup, MCValue Target,
36 const MCFragment *Fragment, const MCFixup &Fixup,
45 const MCFixup &Fixup, MCValue Target, in recordRelocation() argument
50 RecordPPCRelocation(Writer, Asm, Layout, Fragment, Fixup, Target, in recordRelocation()
178 const MCFixup &Fixup) { in getFixupOffset() argument
179 uint32_t FixupOffset = Layout.getFragmentOffset(Fragment) + Fixup.getOffset(); in getFixupOffset()
182 if (unsigned(Fixup.getKind()) == PPC::fixup_ppc_half16) in getFixupOffset()
193 const MCFragment *Fragment, const MCFixup &Fixup, MCValue Target, in recordScatteredRelocation() argument
196 const uint32_t FixupOffset = getFixupOffset(Layout, Fragment, Fixup); in recordScatteredRelocation()
197 const MCFixupKind FK = Fixup.getKind(); in recordScatteredRelocation()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/MCTargetDesc/ |
| D | PPCMachObjectWriter.cpp | 31 const MCFixup &Fixup, MCValue Target,
36 const MCFragment *Fragment, const MCFixup &Fixup,
45 const MCFixup &Fixup, MCValue Target, in recordRelocation() argument
50 RecordPPCRelocation(Writer, Asm, Layout, Fragment, Fixup, Target, in recordRelocation()
178 const MCFixup &Fixup) { in getFixupOffset() argument
179 uint32_t FixupOffset = Layout.getFragmentOffset(Fragment) + Fixup.getOffset(); in getFixupOffset()
182 if (unsigned(Fixup.getKind()) == PPC::fixup_ppc_half16) in getFixupOffset()
193 const MCFragment *Fragment, const MCFixup &Fixup, MCValue Target, in recordScatteredRelocation() argument
196 const uint32_t FixupOffset = getFixupOffset(Layout, Fragment, Fixup); in recordScatteredRelocation()
197 const MCFixupKind FK = Fixup.getKind(); in recordScatteredRelocation()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/MCTargetDesc/ |
| D | AMDGPUAsmBackend.cpp | 33 void applyFixup(const MCAssembler &Asm, const MCFixup &Fixup,
37 bool fixupNeedsRelaxation(const MCFixup &Fixup, uint64_t Value, in fixupNeedsRelaxation() argument
81 static uint64_t adjustFixupValue(const MCFixup &Fixup, uint64_t Value, in adjustFixupValue() argument
85 switch (static_cast<unsigned>(Fixup.getKind())) { in adjustFixupValue()
90 Ctx->reportError(Fixup.getLoc(), "branch size exceeds simm16"); in adjustFixupValue()
106 void AMDGPUAsmBackend::applyFixup(const MCAssembler &Asm, const MCFixup &Fixup, in applyFixup() argument
111 Value = adjustFixupValue(Fixup, Value, &Asm.getContext()); in applyFixup()
115 MCFixupKindInfo Info = getFixupKindInfo(Fixup.getKind()); in applyFixup()
120 unsigned NumBytes = getFixupKindNumBytes(Fixup.getKind()); in applyFixup()
121 uint32_t Offset = Fixup.getOffset(); in applyFixup()
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| /external/llvm/lib/Target/AMDGPU/MCTargetDesc/ |
| D | AMDGPUAsmBackend.cpp | 33 const MCFragment *Fragment, const MCFixup &Fixup, in recordRelocation() argument
49 void applyFixup(const MCFixup &Fixup, char *Data, unsigned DataSize,
51 bool fixupNeedsRelaxation(const MCFixup &Fixup, uint64_t Value, in fixupNeedsRelaxation() argument
95 void AMDGPUAsmBackend::applyFixup(const MCFixup &Fixup, char *Data, in applyFixup() argument
99 switch ((unsigned)Fixup.getKind()) { in applyFixup()
105 uint16_t *Dst = (uint16_t*)(Data + Fixup.getOffset()); in applyFixup()
112 unsigned NumBytes = getFixupKindNumBytes(Fixup.getKind()); in applyFixup()
115 MCFixupKindInfo Info = getFixupKindInfo(Fixup.getKind()); in applyFixup()
120 unsigned Offset = Fixup.getOffset(); in applyFixup()
|