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Searched refs:Float16ToRawbits (Results 1 – 10 of 10) sorted by relevance

/external/vixl/src/
Dutils-vixl.cc53 uint16_t bits = Float16ToRawbits(value); in IsZero()
54 return (bits == Float16ToRawbits(kFP16PositiveZero) || in IsZero()
55 bits == Float16ToRawbits(kFP16NegativeZero)); in IsZero()
58 uint16_t Float16ToRawbits(Float16 value) { return value.rawbits_; } in Float16ToRawbits() function
96 uint16_t rawbits = Float16ToRawbits(val); in Float16Sign()
102 uint16_t rawbits = Float16ToRawbits(val); in Float16Exp()
107 uint16_t rawbits = Float16ToRawbits(val); in Float16Mantissa()
169 uint16_t bits = Float16ToRawbits(value); in Float16Classify()
210 Float16ToRawbits(FPToFloat16(dvalue, FPTieEven, kIgnoreDefaultNaN)); in Float16()
269 uint16_t bits = Float16ToRawbits(value); in FPToFloat()
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Dutils-vixl.h237 friend uint16_t Float16ToRawbits(Float16 value);
245 uint16_t Float16ToRawbits(Float16 value);
285 this->rawbits_ = Float16ToRawbits(f); in SimFloat16()
406 return IsNaN(num) && ((Float16ToRawbits(num) & kFP16QuietNaNMask) == 0); in IsSignallingNaN()
435 RawbitsToFloat16(Float16ToRawbits(num) | kFP16QuietNaNMask)); in ToQuietNaN()
/external/vixl/test/aarch64/
Dtest-api-aarch64.cc70 VIXL_CHECK(Float16ToRawbits(vixl::aarch64::kFP16PositiveInfinity) == in TEST()
71 Float16ToRawbits(vixl::aarch64::kFP16PositiveInfinity)); in TEST()
72 VIXL_CHECK(Float16ToRawbits(vixl::aarch64::kFP16NegativeInfinity) == in TEST()
73 Float16ToRawbits(vixl::aarch64::kFP16NegativeInfinity)); in TEST()
Dtest-utils-aarch64.cc93 uint16_t e_rawbits = Float16ToRawbits(expected); in EqualFP16()
94 uint16_t r_rawbits = Float16ToRawbits(result); in EqualFP16()
203 Float16ToRawbits(expected), in EqualFP16()
Dtest-assembler-aarch64.cc11505 uint16_t raw_n = Float16ToRawbits(n); in MinMaxHelper()
11506 uint16_t raw_m = Float16ToRawbits(m); in MinMaxHelper()
11836 uint64_t bits = static_cast<uint64_t>(Float16ToRawbits(f)); in Float16ToV4H()
13372 ASSERT_EQUAL_128(0, Float16ToRawbits(kFP16PositiveInfinity), q0); in TEST()
13373 ASSERT_EQUAL_128(0, Float16ToRawbits(kFP16NegativeInfinity), q1); in TEST()
13380 ASSERT_EQUAL_128(0, Float16ToRawbits(kFP16PositiveInfinity), q20); in TEST()
13381 ASSERT_EQUAL_128(0, Float16ToRawbits(kFP16NegativeInfinity), q21); in TEST()
/external/vixl/src/aarch64/
Dsimulator-aarch64.h189 WriteLane(Float16ToRawbits(src), lane); in WriteLane()
1011 return Float16ToRawbits(ReadHRegister(code));
1130 WriteVRegister(code, Float16ToRawbits(value), log_mode);
1434 VIXL_STATIC_ASSERT(sizeof(Float16ToRawbits(value)) == kHRegSizeInBytes);
1435 return GetPrintRegisterFormatForSizeFP(sizeof(Float16ToRawbits(value)));
Dlogic-aarch64.cc3907 uint16_t rawbits = Float16ToRawbits(value); in IsNormal()
4325 dup_immediate(vform, temp, Float16ToRawbits(SimFloat16(0.0))); in fcmp_zero()
4543 dst.SetUint(vform, 0, Float16ToRawbits(result)); \
4862 Float16ToRawbits( in fcvtn()
4882 Float16ToRawbits( in fcvtn2()
Dsimulator-aarch64.cc2750 WriteHRegister(dest, Float16ToRawbits(instr->GetImmFP16())); in VisitFPImmediate()
3351 Float16ToRawbits( in VisitFPDataProcessing1Source()
3362 Float16ToRawbits( in VisitFPDataProcessing1Source()
5440 imm = Float16ToRawbits(instr->GetImmNEONFP16()); in VisitNEONModifiedImmediate()
Dmacro-assembler-aarch64.cc1571 uint16_t rawbits = Float16ToRawbits(imm); in Fmov()
Dassembler-aarch64.cc4976 uint16_t bits = Float16ToRawbits(imm); in FP16ToImm8()
5481 uint16_t bits = Float16ToRawbits(imm); in IsImmFP16()