Searched refs:FullDestReg (Results 1 – 2 of 2) sorted by relevance
/external/llvm/lib/Target/AMDGPU/ |
D | SIInstrInfo.cpp | 2733 unsigned FullDestReg = MRI.createVirtualRegister(NewDestRC); in splitScalar64BitUnaryOp() local 2734 BuildMI(MBB, MII, DL, get(TargetOpcode::REG_SEQUENCE), FullDestReg) in splitScalar64BitUnaryOp() 2740 MRI.replaceRegWith(Dest.getReg(), FullDestReg); in splitScalar64BitUnaryOp() 2746 addUsersToMoveToVALUWorklist(FullDestReg, MRI, Worklist); in splitScalar64BitUnaryOp() 2798 unsigned FullDestReg = MRI.createVirtualRegister(NewDestRC); in splitScalar64BitBinaryOp() local 2799 BuildMI(MBB, MII, DL, get(TargetOpcode::REG_SEQUENCE), FullDestReg) in splitScalar64BitBinaryOp() 2805 MRI.replaceRegWith(Dest.getReg(), FullDestReg); in splitScalar64BitBinaryOp() 2813 addUsersToMoveToVALUWorklist(FullDestReg, MRI, Worklist); in splitScalar64BitBinaryOp()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
D | SIInstrInfo.cpp | 4211 unsigned FullDestReg = MRI.createVirtualRegister(NewDestRC); in splitScalar64BitUnaryOp() local 4212 BuildMI(MBB, MII, DL, get(TargetOpcode::REG_SEQUENCE), FullDestReg) in splitScalar64BitUnaryOp() 4218 MRI.replaceRegWith(Dest.getReg(), FullDestReg); in splitScalar64BitUnaryOp() 4224 addUsersToMoveToVALUWorklist(FullDestReg, MRI, Worklist); in splitScalar64BitUnaryOp() 4234 unsigned FullDestReg = MRI.createVirtualRegister(&AMDGPU::VReg_64RegClass); in splitScalar64BitAddSub() local 4278 BuildMI(MBB, MII, DL, get(TargetOpcode::REG_SEQUENCE), FullDestReg) in splitScalar64BitAddSub() 4284 MRI.replaceRegWith(Dest.getReg(), FullDestReg); in splitScalar64BitAddSub() 4292 addUsersToMoveToVALUWorklist(FullDestReg, MRI, Worklist); in splitScalar64BitAddSub() 4344 unsigned FullDestReg = MRI.createVirtualRegister(NewDestRC); in splitScalar64BitBinaryOp() local 4345 BuildMI(MBB, MII, DL, get(TargetOpcode::REG_SEQUENCE), FullDestReg) in splitScalar64BitBinaryOp() [all …]
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