Searched refs:HHI_GCLK_MPEG0 (Results 1 – 2 of 2) sorted by relevance
| /external/u-boot/drivers/clk/ |
| D | clk_meson.c | 27 MESON_GATE(CLKID_DDR, HHI_GCLK_MPEG0, 0),
28 MESON_GATE(CLKID_DOS, HHI_GCLK_MPEG0, 1),
29 MESON_GATE(CLKID_ISA, HHI_GCLK_MPEG0, 5),
30 MESON_GATE(CLKID_PL301, HHI_GCLK_MPEG0, 6),
31 MESON_GATE(CLKID_PERIPHS, HHI_GCLK_MPEG0, 7),
32 MESON_GATE(CLKID_SPICC, HHI_GCLK_MPEG0, 8),
33 MESON_GATE(CLKID_I2C, HHI_GCLK_MPEG0, 9),
34 MESON_GATE(CLKID_SAR_ADC, HHI_GCLK_MPEG0, 10),
35 MESON_GATE(CLKID_SMART_CARD, HHI_GCLK_MPEG0, 11),
36 MESON_GATE(CLKID_RNG0, HHI_GCLK_MPEG0, 12),
[all …]
|
| /external/u-boot/arch/arm/include/asm/arch-meson/ |
| D | clock.h | 35 #define HHI_GCLK_MPEG0 0x140 /* 0x50 offset in data sheet */ macro
|